US 7,492,629 B2
Magnetic random access memory and operating method of the same
Tadahiko Sugibayashi, Tokyo (Japan); Noboru Sakimura, Tokyo (Japan); and Takeshi Honda, Tokyo (Japan)
Assigned to NEC Corporation, Tokyo (Japan)
Filed on Dec. 21, 2006, as Appl. No. 11/614,231.
Claims priority of application No. 2006-001794 (JP), filed on Jan. 06, 2006; and application No. 2006-157574 (JP), filed on Jun. 06, 2006.
Prior Publication US 2007/0159876 A1, Jul. 12, 2007
Int. Cl. G11C 11/00 (2006.01)
U.S. Cl. 365—158  [365/171] 19 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a memory array including memory cells arranged in rows and columns; and
a sense amplifier circuit
wherein each of said memory cells comprising:
at least one magnetoresistive element storing data; and
an amplifying member used to amplify a signal generated by a current through said at least one magnetoresistive element, and
wherein said sense amplifier circuit identifies data stored in said at least one magnetoresistive element in response to an output signal of said amplifying member.