| US 7,492,420 B2 | ||
| Array substrate for LCD device having metal-diffusion film and manufacturing method thereof | ||
| Won-Ho Cho, Gumi-si (Korea, Republic of); Gyoo-Chul Jo, Gunpo-si (Korea, Republic of); Gue-Tai Lee, Yeongcheon-si (Korea, Republic of); Jin-Gyu Kang, Incheon (Korea, Republic of); Beung-Hwa Jeong, Gumi-si (Korea, Republic of); and Jin-Young Kim, Incheon (Korea, Republic of) | ||
| Assigned to LG Display Co., Ltd., Seoul (Korea, Republic of) | ||
| Filed on Jan. 29, 2008, as Appl. No. 12/10,753. | ||
| Application 12/010753 is a division of application No. 10/875986, filed on Jun. 25, 2004, granted, now 7,352,417. | ||
| Claims priority of application No. 10-2003-0043962 (KR), filed on Jun. 30, 2003. | ||
| Prior Publication US 2008/0129943 A1, Jun. 05, 2008 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. G02F 1/136 (2006.01) | ||
| U.S. Cl. 349—43 [257/59] | 10 Claims |
| 1. A method of forming an array substrate for use in a liquid crystal display device, comprising:
forming a gate electrode, a gate line and a gate pad electrode on a substrate, wherein all of the gate electrode, the gate
line and the gate pad electrode have a double-layered structure including a first barrier metal layer and a first copper layer;
applying heat to the double-layered gate electrode, line and pad electrode so as to form a first out-diffusion film covering
and surrounding the first copper layer;
forming a gate insulation layer on the substrate to cover the gate electrode, gate line and gate pad electrode which include
the first barrier metal layer, the first copper layer and the first out-diffusion film;
forming an active layer and an ohmic contact layer sequentially on the gate insulation layer and over the gate electrode;
forming a data line, source and drain electrodes and a data pad electrode, wherein the data line is on the gate insulation
layer and crossed the gate line, wherein the source and drain electrodes contact the ohmic contact layer, wherein the data
pad electrode is disposed on the gate insulation layer, and wherein all of the data line, the source and drain electrodes,
the capacitor electrode and the data pad electrode have a double-layered structure including a second barrier metal layer
and a second copper layer;
applying heat to the double-layered data line, source and drain electrodes and data pad electrode so as to form a second out-diffusion
film that covers and surrounds the second copper layer;
forming a passivation layer formed on the gate insulation layer to cover the double-layered data line, source and drain electrodes,
and data pad electrode all of which have the second barrier metal layer, the second copper layer and the second out-diffusion
film, wherein the passivation layer has a drain contact hole exposing the drain electrode, a gate pad contact hole exposing
the gate pad electrode, and a data pad contact hole exposing the data pad electrode; and
forming a pixel electrode, a gate pad terminal and a data pad terminal on the passivation layer using a transparent conductive
material.
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