| US 7,491,599 B2 | ||
| Gated diode nonvolatile memory process | ||
| Wen Jer Tsai, Hualien (Taiwan); Tien Fan Ou, Taipei (Taiwan); and Erh-Kun Lai, Longjing Shiang (Taiwan) | ||
| Assigned to Macronix International Co., Ltd., Hsinchu (Taiwan) | ||
| Filed on May 31, 2006, as Appl. No. 11/421,194. | ||
| Application 11/421194 is a continuation in part of application No. 11/298288, filed on Dec. 09, 2005, granted, now 7,269,062. | ||
| Application 11/298288 is a continuation in part of application No. 11/298912, filed on Dec. 09, 2005, granted, now 7,283,389. | ||
| Application 11/298912 is a continuation in part of application No. 11/299310, filed on Dec. 09, 2005, granted, now 7,272,038. | ||
| Prior Publication US 2007/0131999 A1, Jun. 14, 2007 | ||
| Int. Cl. H01L 21/8234 (2006.01) | ||
| U.S. Cl. 438—237 [257/E21.053] | 23 Claims |
| 1. A method for making a nonvolatile memory device in an integrated circuit, the device including a diode having a first diode
node and a second diode node, comprising:
forming isolation dielectric areas of the integrated circuit to isolate the device from neighboring devices;
adding a first charge type of the integrated circuit to form the first diode node between the isolation dielectric areas,
the integrated circuit having the second diode node, the first charge type being opposite to a second charge type of the second
diode node adjacent to the first diode node, the second diode node isolated from neighboring devices by the isolation dielectric
areas, the first diode node and the second diode node separated by a junction, the junction covered by the isolation dielectric
areas;
removing at least part of the isolation dielectric covering the junction, but leaving a remainder of the isolation dielectric
areas to isolate the device from neighboring devices;
forming a charge storage structure and one or more storage dielectric structures on the integrated circuit, the charge storage
structure and the one or more storage dielectric structures covering at least the junction and parts of the first and second
diode nodes adjacent to the junction, such that the one or more storage dielectric structures are at least partly between
the charge storage structure and the first and second diode nodes, and the one or more storage dielectric structures are at
least partly between the charge storage structure and a source of gate voltage of the device; and
forming the gate supplying the gate voltage on the integrated circuit.
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