| US 7,490,227 B1 | ||
| Method and system to recreate instruction and data traces in an embedded processor | ||
| Goran Bilski, Molndal (Sweden); Jorge Ernesto Carrillo, San Jose, Calif. (US); Usha Prabhu, West Lafayette, Ind. (US); and Navaneethan Sundaramoorthy, San Jose, Calif. (US) | ||
| Assigned to Xilinx, Inc., San Jose, Calif. (US) | ||
| Filed on Aug. 31, 2004, as Appl. No. 10/930,437. | ||
| Int. Cl. G06F 11/25 (2006.01) | ||
| U.S. Cl. 712—227 [714/735; 714/742; 717/131] | 12 Claims |
| 1. A method of recreating instructions and data traces in an embedded processor, comprising:
fetching instructions from an executable program in an order corresponding to sequential program counter values to provide
fetched instructions;
determining whether the fetched instructions specify a destination register;
obtaining a destination register from each fetched instruction, if specified;
for each instruction specifying a destination register, storing, in a data structure, a data pair consisting of a value from
a collected destination register and a corresponding program counter value and, for instructions that do not specify a destination
register, not storing data in the data structure, wherein the value from the collected destination register corresponding
to the program counter value comprises a data trace; and
recreating the data trace and the state of the embedded processor after each instruction is executed by retrieving a data
pair from the data trace and determining a register of the embedded processor from which a stored value of the data pair was
collected according to an instruction of the executable program corresponding to a program counter value of the data pair.
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