| US 7,490,215 B2 | ||
| Media memory system and method for providing concurrent memory access to a plurality of processors through separate translation table information | ||
| Brent S. Baxter, Hillsboro, Oreg. (US); Prashant Sethi, Folsom, Calif. (US); Clifford D. Hall, Orangeville, Calif. (US); and William H. Clifford, Gig Harbor, Wash. (US) | ||
| Assigned to Intel Corporation, Santa Clara, Calif. (US) | ||
| Filed on Dec. 22, 2004, as Appl. No. 11/22,503. | ||
| Prior Publication US 2006/0136693 A1, Jun. 22, 2006 | ||
| Int. Cl. G06F 12/00 (2006.01) | ||
| U.S. Cl. 711—206 [711/150] | 19 Claims |
| 1. A method, comprising:
matching primary processor address translations to at least one secondary processor address translation;
providing concurrent shared memory access to at least two secondary processors through separate translation table information,
wherein each of the at least two secondary processors maintains separate translation table hardware private to a given application;
and
exchanging real-time data between the primary and at least two secondary processors though the shared memory.
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