| US 7,490,121 B2 | ||
| Modular binary multiplier for signed and unsigned operands of variable widths | ||
| Fadi Y. Busaba, Poughkeepsie, N.Y. (US); Steven R. Carlough, Poughkeepsie, N.Y. (US); David S. Hutton, Poughkeepsie, N.Y. (US); Christopher A. Krygowski, LaGrangeville, N.Y. (US); John G. Rell, Jr., Saugerties, N.Y. (US); and Sheryll H. Veneracion, Poughkeepsie, N.Y. (US) | ||
| Assigned to International Business Machines Corporation, Armonk, N.Y. (US) | ||
| Filed on May 16, 2007, as Appl. No. 11/749,239. | ||
| Application 11/749239 is a division of application No. 10/435976, filed on May 12, 2003, granted, now 7,266,580. | ||
| Prior Publication US 2007/0214205 A1, Sep. 13, 2007 | ||
| Int. Cl. G06F 7/52 (2006.01) | ||
| U.S. Cl. 708—625 | 14 Claims |
| 1. A method of implementing binary multiplication in a processing device, the method comprising:
inputting a multiplicand and a multiplier from a storage device into a modular binary multiplier device, the modular binary
multiplier device further having an input merge register to receive the multiplicand and recording logic configured to receive
the multiplier;
in the event the multiplier is larger than a selected length, partitioning the multiplier into a plurality of multiplier subgroups;
in the event the multiplicand is larger than a selected length, partitioning data bits of the multiplicand into first and
second multiplicand subgroups and at least one of zeroing out of bits of the second multiplicand subgroup and sign-extending
the second multiplicand subgroup;
establishing a plurality of multiplicand multiples based on at least one of a selected multiplicand subgroup of the first
and second multiplicand subgroups and the multiplicand;
selecting one or more of the multiplicand multiples of the first and second multiplicand multiples based on the each multiplier
subgroup of the plurality of multiplier subgroups; and
generating a first modular product based on the selected multiplicand multiples, and outputting at least the first modular
product to combinational logic, the first modular product for use in a processor architecture.
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