US 7,489,148 B2
Methods for access to a plurality of unsingulated integrated circuits of a wafer using single-sided edge-extended wafer translator
Morgan T. Johnson, Portland, Oreg. (US)
Assigned to Advanced Inquiry Systems, Inc., Hillsboro, Oreg. (US)
Filed on Jul. 27, 2007, as Appl. No. 11/881,574.
Claims priority of provisional application 60/834063, filed on Jul. 28, 2006.
Prior Publication US 2008/0048696 A1, Feb. 28, 2008
Int. Cl. G01R 31/02 (2006.01)
U.S. Cl. 324—754  [324/758] 9 Claims
OG exemplary drawing
 
1. A method of providing access to a plurality of unsingulated integrated circuits on a wafer, comprising:
providing a first support structure, the first support structure having a first major surface and a second major surface; the first major surface thereof adapted to receive a wafer, and the second major surface thereof adapted to electrically couple to tester pin electronics external to the integrated circuits;
disposing a wafer, the wafer having a plurality of unsingulated integrated circuits thereon, on the first major surface of the first support structure;
disposing a central portion of a removably attachable, single-sided edge-extended wafer translator over the wafer, and a peripheral portion of the removably attachable, single-sided edge-extended wafer translator on the first surface of the first support structure; and
evacuating one or more gases from between the central portion of the removably attachable, single-sided edge-extended wafer translator and the wafer
wherein the step of evacuating results in the wafer and the central portion of the removably attachable single-sided edge-extended wafer translator being removably attached to each other.