| US 7,489,007 B2 | ||
| High-voltage lateral DMOS device | ||
| Richard K. Williams, Cupertino, Calif. (US); and Donald Ray Disney, Cupertino, Calif. (US) | ||
| Assigned to Advanced Analogic Technologies, Inc., Santa Clara, Calif. (US) | ||
| Filed on Nov. 05, 2007, as Appl. No. 11/982,780. | ||
| Application 11/982780 is a division of application No. 11/443745, filed on May 31, 2006. | ||
| Prior Publication US 2008/0061367 A1, Mar. 13, 2008 | ||
| Int. Cl. H01L 23/62 (2006.01) | ||
| U.S. Cl. 257—335 [257/336; 257/E21.417] | 5 Claims |
| 1. A lateral DMOS device formed in a semiconductor substrate of a first conductivity type, the substrate not comprising an
epitaxial region, the DMOS device comprising:
a field oxide layer formed at a surface of the substrate, the field oxide layer having first, second and third openings, the
second opening being located between the first and third openings, the field oxide layer comprising a first segment between
the first and second openings and a second segment between the second and third openings;
a conformal submerged floor isolation layer of a second conductivity type in the substrate, the submerged floor isolation
layer extending directly beneath the first and second segments of the field oxide layer as well as directly beneath the first,
second and third openings in the field oxide layer, the submerged floor isolation layer comprising first, second and third
deep portions located directly below the first, second and third openings in the field oxide layer, respectively, and first
and second shallow portions located directly below the first and second segments of the field oxide layer, respectively, each
of the deep portions having an upper boundary located below an upper boundary of each of the shallow portions, each of the
deep portions having a lower boundary located below a lower boundary of each of the shallow portions;
first and second drain regions of the second conductivity type extending downward from the surface of the substrate in the
first and third openings, respectively, and merging with the first and third deep portions of the submerged floor isolation
layer, respectively;
a source region of the second conductivity type extending downward from the surface of the substrate in the second opening;
a first drift region of the second conductivity type above the submerged floor isolation layer, the first drift region being
located directly under the first segment of the field oxide layer and extending into an area directly below the second opening;
a second drift region of the second conductivity type above the submerged floor isolation layer, the second drift region being
located directly under the second segment of the field oxide layer and extending into an area directly below the second opening;
a first channel region located adjacent the surface of the substrate between the first drift region and the source region;
a second channel region located adjacent the surface of the substrate between the second drift region and the source region;
a first gate located at least in part directly above the first channel region; and
a second gate located at least in part directly above the second channel region.
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