| US 7,488,993 B2 | ||
| Semiconductor device and method of manufacturing the same | ||
| Kenichi Tokano, Kanagawa (Japan); Motoshige Kobayashi, Kanagawa (Japan); and Kazuyuki Saito, Kanagawa (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Feb. 28, 2005, as Appl. No. 11/67,627. | ||
| Claims priority of application No. 2004-076631 (JP), filed on Mar. 17, 2004. | ||
| Prior Publication US 2005/0208738 A1, Sep. 22, 2005 | ||
| Int. Cl. H01L 29/51 (2006.01) | ||
| U.S. Cl. 257—164 [257/165; 257/197; 257/273; 257/565] | 15 Claims |
| 1. A semiconductor device, comprising:
a semiconductor substrate of 100 micrometers or less in thickness;
an electrode pattern formed above the semiconductor substrate;
an insulation film of 50 micrometers or greater in thickness residing on parts of the upper surface side of the semiconductor
substrate other than on the electrode pattern and a device forming region; and
a semiconductor element provided in the device forming region,
wherein the semiconductor element includes a semiconductor layer of a first conductivity type provided at the upper part of
the semiconductor substrate; a well region of a second conductivity type provided at an upper surface part of the semiconductor
layer, the well contacting the semiconductor layer; first and second impurity diffused regions of the first conductivity type
as source and drain regions provided in the well region; and a gate electrode provided at an interface area between the semiconductor
layer, the well region and the first and second impurity diffused regions on a gate insulating film.
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