| US 7,488,631 B2 | ||
| Semiconductor device having a schottky source/drain transistor | ||
| Atsushi Yagishita, Yokohama (Japan) | ||
| Assigned to Kabushiki Kaisha Toshiba, Tokyo (Japan) | ||
| Filed on Jun. 11, 2007, as Appl. No. 11/808,467. | ||
| Application 11/808467 is a division of application No. 11/116328, filed on Apr. 28, 2005, granted, now 7,247,913. | ||
| Claims priority of application No. 2004-205849 (JP), filed on Jul. 13, 2004; and application No. 2005-113482 (JP), filed on Apr. 11, 2005. | ||
| Prior Publication US 2007/0243677 A1, Oct. 18, 2007 | ||
| Int. Cl. H01L 21/84 (2006.01); H01L 21/336 (2006.01) | ||
| U.S. Cl. 438—157 [438/164; 438/197; 438/299] | 6 Claims |
| 1. A semiconductor device manufacturing method comprising:
forming a channel layer made of an island shaped semiconductor material on a substrate;
forming a gate insulation film and a gate electrode on the channel layer;
forming an interlayer insulation film which surrounds the periphery of the gate insulation film and the gate electrode on
the substrate;
forming a pair of holes which sandwiches the gate electrode, a part of a side wall of the holes being composed of the channel
layer;
forming an insulation film on a surface of the channel layer which configures the side walls of the holes; and
forming a pair of source/drain electrode by embedding a metal material in the pair of holes.
|