a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal;

first and second MOS transistors for converting the current signal received to a square-root compressed or approximately square-root compressed voltage signal; and

third and fourth MOS transistors for converting the square-root compressed or approximately square-root compressed voltage signal to a linear current signal, wherein:

transconductance is controlled by varying a bias current for the first and second MOS transistors and a bias current for the third and fourth MOS transistors,

the voltage-current conversion circuit comprises:

two operational amplifiers into which the input voltage signal is input; and

a resistance interposed between outputs of the two operational amplifiers,

each of the outputs of the two operational amplifiers serves as a source follower biased with a first current source or a second current source, and the current signal is taken from a drain of the source follower,

gates of the first and second MOS transistors are biased with a predetermined bias voltage, and the current signal output from the voltage-current conversion circuit is input into sources of the first and second MOS transistors,

sources of the third and fourth MOS transistors are common-connected, a third current source is connected to the common-connected sources, and a gate of the third MOS transistor is connected to a source of one of the first and second MOS transistors while a gate of the fourth MOS transistor is connected to a source of the other first or second MOS transistor,

the variable transconductance circuit uses drains of the third and fourth MOS transistors as current outputs, and controls transconductance by varying the current from the first and second current sources and the current from the third current source.