| US 7,485,960 B2 | ||
| Semiconductor device and manufacturing method thereof | ||
| Masashi Funakoshi, Osaka (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on Oct. 05, 2006, as Appl. No. 11/543,153. | ||
| Claims priority of application No. 2005-318933 (JP), filed on Nov. 02, 2005. | ||
| Prior Publication US 2007/0096314 A1, May 03, 2007 | ||
| Int. Cl. H01L 23/52 (2006.01); H01L 21/00 (2006.01) | ||
| U.S. Cl. 257—737 [257/383; 257/E23.069; 257/E21.505; 438/113; 438/118; 438/460] | 6 Claims |
| 1. A semiconductor device comprising:
a semiconductor element having a plurality of electrodes;
an interposer having electrodes arranged on a top face thereof in four directions and external electrodes arranged on a bottom
face thereof with the semiconductor element mounted on the top face thereof;
an adhesive material fixing the semiconductor element to the top face of the interposer;
metal nanowires electrically connecting between the plurality of electrodes of the semiconductor element and the electrodes,
arranged in four directions, of the interposer;
an insulating material sealing a region containing the semiconductor element and the metal nanowires; and
metal balls mounted on the external electrodes of the interposer,
wherein at least a pair of patterns, different in shape from the electrodes arranged in four directions, are designed on diagonal
corners of a region surrounded by the electrodes arranged on the interposer in four directions, and the at least a pair of
patterns is within a region surrounded in four directions by the electrodes.
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