| US 7,485,939 B2 | ||
| Solid-state imaging device having a defect control layer and an inversion layer between a trench and a charge accumulating area | ||
| Shouzi Tanaka, Nara-ken (Japan); and Ryohei Miyagawa, Kyoto-fu (Japan) | ||
| Assigned to Panasonic Corporation, Osaka (Japan) | ||
| Filed on May 17, 2006, as Appl. No. 11/435,098. | ||
| Claims priority of application No. 2005-146488 (JP), filed on May 19, 2005. | ||
| Prior Publication US 2006/0261386 A1, Nov. 23, 2006 | ||
| Int. Cl. H01L 27/146 (2006.01) | ||
| U.S. Cl. 257—446 [257/291; 257/292; 257/294; 257/463; 257/E27.133] | 2 Claims |
| 1. A solid-state imaging device comprising:
a semiconductor substrate; and
a well of a first conductivity type that is formed in the semiconductor substrate and is divided into a plurality of pixel
cells by a trench to isolate the pixel cells from each other, the trench forming a lattice pattern in plan view, and each
pixel cell having a photo diode, a shield layer, a defect control layer, and an inversion layer, wherein
the photo diode is of a second conductivity type,
the shield layer is of the first conductivity type, is located between a surface of the pixel cell and the photo diode, and
contacts the photo diode,
the defect control layer is of the first conductivity type, is highly concentrated by addition of an impurity of the first
conductivity type, and is located along a trench surface, and
the inversion layer is of the second conductivity type, contacts the defect control layer, the shield layer, and the photo
diode, and separates the defect control layer from the photo diode, an impurity concentration in the inversion layer being
higher than an impurity concentration in the photo diode.
|