sequentially stacking a tunneling insulating film, a first floating gate electrode material layer, a second floating gate electrode material layer different from said first floating gate electrode material layer in carrier trapping efficiency, an inter-layer insulating layer, and a control gate electrode layer on a semiconductor substrate or on a thin-film semiconductor layer on an insulating substrate;

processing said layers from said tunneling insulating film and said control gate electrode layer into a given gate configuration; and

thereafter forming source/drain regions reflecting said gate configuration on said semiconductor substrate or said thin-film semiconductor layer,

wherein at least one of steps of making said first and second floating gate electrode material layers includes a step of forming a silicon insulating film of a non-stoichiometric composition on the entire surface and annealing it to precipitate fine particles of silicon or germanium in said silicon insulating film.