| US 7,480,188 B2 | ||
| Memory Access apparatus | ||
| Kazuhiro Nakamuta, Gunma-ken (Japan); Iwao Honda, Gunma-ken (Japan); and Takashi Kuroda, Gunma-ken (Japan) | ||
| Assigned to Sanyo Electric Co., Ltd., Osaka (Japan) | ||
| Filed on Apr. 12, 2007, as Appl. No. 11/734,749. | ||
| Claims priority of application No. 2006-111318 (JP), filed on Apr. 13, 2006. | ||
| Prior Publication US 2007/0242533 A1, Oct. 18, 2007 | ||
| Int. Cl. G11C 7/10 (2006.01) | ||
| U.S. Cl. 365—189.01 [365/233; 365/191] | 6 Claims |
| 1. A memory access apparatus reading data from a memory, the memory including
a terminal that address information is input to,
a terminal that a clock signal changing at a predetermined cycle is input to,
a terminal that a read command is input to, and
a terminal that outputs data stored at an address identified by the address information at a timing of the clock signal changing
from one level to the other level in accordance with the read command,
the memory access apparatus comprising:
an address information output unit that outputs the address information and the read command at a first timing of the clock
signal changing from the one level to the other level; and
a read data storage unit that stores data output from the memory at a second timing after the first timing of the clock signal
changing from the one level to the other level, the read data storage unit storing the data at a third timing after the second
timing of the clock signal changing from the one level to the other level.
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