| US 7,479,698 B2 | ||
| Bonding pad structure disposed in semiconductor device and related method | ||
| Ming-Dou Ker, Hsin-Chu (Taiwan); Yuan-Wen Hsiao, Tai-Chung (Taiwan); and Yuh-Kuang Tseng, Tao-Yuan Hsien (Taiwan) | ||
| Assigned to Faraday Technology Corp., Hsin-Chu (Taiwan) | ||
| Filed on May 24, 2007, as Appl. No. 11/753,567. | ||
| Prior Publication US 2008/0290457 A1, Nov. 27, 2008 | ||
| Int. Cl. H01L 23/48 (2006.01) | ||
| U.S. Cl. 257—734 [438/109; 257/686] | 9 Claims |

| 1. A bonding pad structure disposed in a semiconductor device, the semiconductor device having a substrate, the bonding pad
structure comprising:
a connection structure, for allowing a direct connection from a bonding wire; and
an induction structure, coupled with the connection structure, for lowering an effective capacitance Ceff between the bonding wire and the substrate, the induction structure comprising at least a metal layer;
wherein the effective capacitance Ceff satisfies a formula as below:
![]() wherein Cpad is an effective capacitance between the bonding wire and the metal layer, L is an effective inductance between the metal layer
and the substrate, Cpara is a parasitic capacitance within the induction structure, and ω is a signal frequency; Ceff is smaller than Cpad in a specific frequency range, and Ceff is substantially equal to zero under a condition of ω=1/√{square root over (LCpara)}.
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