| US 7,479,427 B2 | ||
| Semiconductor device and method of fabrication | ||
| Masahiko Higashi, Aizuwakamatsu (Japan); and Hiroyuki Nansei, Aizuwakamatsu (Japan) | ||
| Assigned to Spansion LLC, Sunnyvale, Calif. (US) | ||
| Filed on Sep. 27, 2005, as Appl. No. 11/237,591. | ||
| Application 11/237591 is a continuation of application No. PCT/JP2004/014254, filed on Sep. 29, 2004. | ||
| Prior Publication US 2006/0076598 A1, Apr. 13, 2006 | ||
| Int. Cl. H01L 21/8247 (2006.01) | ||
| U.S. Cl. 438—258 [257/E21.179] | 5 Claims |
| 1. A method of fabricating a semiconductor process comprising the steps of:
forming electrodes extending in a column direction on a semiconductor substrate;
forming sidewalls of silicon nitride on side walls of the electrodes;
implanting ions into the semiconductor substrate with a mask provided by the sidewalls of silicon nitride so that bit lines
are self-aligned;
forming word lines extending in a row direction on the semiconductor substrate; and
removing portions of the electrodes extending in the column direction, which portions are located in a region in which the
word lines are not provided, so that the electrodes are divided into parts.
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