| US 7,478,289 B1 | ||
| System and method for improving the yield of integrated circuits containing memory | ||
| Anthony M. Tamasi, San Jose, Calif. (US); Oren Rubenstein, Sunnyvale, Calif. (US); Srihari Vegesna, San Jose, Calif. (US); Jue Wu, San Jose, Calif. (US); and Sean J. Treichler, Mountain View, Calif. (US) | ||
| Assigned to NVIDIA Corporation, Santa Clara, Calif. (US) | ||
| Filed on Jun. 03, 2005, as Appl. No. 11/145,143. | ||
| Int. Cl. G11C 29/44 (2006.01); G11C 29/50 (2006.01) | ||
| U.S. Cl. 714—718 [714/710] | 5 Claims |
| 1. A computer system configured to use only regions of a memory element that do not include memory failures, the computing
device comprising:
a host device, including:
a host memory that stores a software driver,
host processor connected to the host memory and configured to execute the software driver, and
a system interface connected to the host processor; and
an integrated circuit, the integrated circuit including:
a programmable graphics processor configured to process graphics commands;
a graphics interface connected to the system interface and configured to communicate with the system interface, and
a graphics memory element connected to the graphics interface, wherein the graphics memory element has a first region and
a second region, a first memory state indicator that indicates whether the first region includes a memory failure, and a second
memory state indicator that indicates whether the second region includes a memory failure;
wherein the software driver is configured to:
read the first memory state indicator via the system interface and graphics interface to determine that the first region includes
a memory failure;
read the second memory state indicator via the system interface and graphics interface to determine that the second region
does not include a memory failure; and
use the second region and not use the first region.
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