| US 7,477,175 B1 | ||
| Sigma delta analog to digital converter and a method for analog to digital conversion | ||
| Vadim Tkachev, Rehovot (Israel); and Vladimir Koifman, Rishon Le'Zion (Israel) | ||
| Assigned to Advasense Technologies (2004) Ltd, Raanana (Israel) | ||
| Filed on Oct. 24, 2007, as Appl. No. 11/877,705. | ||
| Int. Cl. H03M 3/00 (2006.01) | ||
| U.S. Cl. 341—143 [341/155] | 21 Claims |

| 1. A device, comprising:
an input node, adapted to receive an analog input current;
an integrating capacitor; wherein a first end of the integrating capacitor is coupled to the input node;
a quantizer that comprises a data input, a clock input and an output; wherein the data input is coupled to the input node,
the clock input receives a jittered clock signal and the output controls a first switch in response to a voltage level of
the input node;
a fast charge transfer circuit, for transferring to the integrating capacitor a fixed charge if the first switch is closed;
wherein the fixed charge is being transferred during a charge transfer period that is substantially shorter than a minimal
clock signal phase of the jittered clock signal; and
the first switch, coupled between the input node and the fast charge transfer circuit.
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