| US 7,477,097 B2 | ||
| Internal voltage generating circuit | ||
| Jun-Gi Choi, Kyoungki-do (Korea, Republic of); and Seung-Min Oh, Kyoungki-do (Korea, Republic of) | ||
| Assigned to Hynix Semiconductor Inc., Kyoungki-Do (Korea, Republic of) | ||
| Filed on Sep. 29, 2006, as Appl. No. 11/529,254. | ||
| Claims priority of application No. 10-2005-0090967 (KR), filed on Sep. 29, 2005; and application No. 10-2006-0029647 (KR), filed on Mar. 31, 2006. | ||
| Prior Publication US 2007/0069805 A1, Mar. 29, 2007 | ||
| Int. Cl. G05F 1/575 (2006.01); H03K 3/356 (2006.01) | ||
| U.S. Cl. 327—543 [327/175; 327/541] | 44 Claims |
| 1. An internal voltage generating circuit, comprising:
a back bias voltage detector for detecting a level difference between a back bias voltage and a reference voltage;
a period controller for controlling a period of an oscillating signal based on a detecting signal of the back bias voltage
detector; and
a pumping unit for pumping the back bias voltage according to an activation period of the oscillating signal,
wherein the period controller includes:
an initial signal generator for generating an initial signal in response to the detecting signal, a power-up signal and an
enable signal;
an enable signal generator for generating the enable signal having a delay time controlled by the power-up signal;
a shift register unit for counting the initial signal according to the detecting signal in activation condition of the enable
signal and outputting plural count signals;
a decoder and latch unit for decoding and latching the plural count signals and outputting plural pumping control signals;
and
a pumping voltage oscillator for controlling capacitance according to conditions of the plural pumping control signals and
outputting the oscillating signal having different periods.
|