| US 7,476,934 B2 | ||
| Structure for an LDMOS transistor and fabrication method thereof | ||
| Jia-Wei Yang, Hsinchu (Taiwan); Da-Pong Chang, Shinyi Chiu (Taiwan); and Chih-Cherng Liao, Hsinchu (Taiwan) | ||
| Assigned to Vanguard International Semiconductor Corporation, Hsinchu (Taiwan) | ||
| Filed on May 26, 2006, as Appl. No. 11/441,246. | ||
| Application 11/441246 is a division of application No. 10/428940, filed on May 05, 2003, granted, now 7,074,658. | ||
| Prior Publication US 2006/0220117 A1, Oct. 05, 2006 | ||
| Int. Cl. H01L 29/76 (2006.01) | ||
| U.S. Cl. 257—335 [257/330; 257/368; 257/341; 257/328; 257/327; 257/343; 257/401] | 7 Claims |
| 1. A structure for an LDMOS transistor, comprising:
a semiconductor silicon substrate having a surface region of a first conductive type;
a horseshoe-shaped gate layer formed on the semiconductor silicon substrate, in which the gate layer comprises a transverse-extending
area, a first lengthwise-extending area connected to a left end of the transverse-extending area and a second lengthwise-extending
area connected to a right end of the transverse-extending area;
a first source region of the first conductive type formed in the surface region of the semiconductor silicon substrate and
disposed at the left periphery of the first lengthwise-extending area of the gate layer;
a second source region of the first conductive type formed in the surface region of the semiconductor silicon substrate and
disposed at the right periphery of the second lengthwise-extending area of the gate layer;
a first drain region of the first conductive type formed in the surface region of the semiconductor silicon substrate and
disposed between the first lengthwise-extending area and the second lengthwise-extending area of the gate layer;
a first ion-diffusion body of a second conductive type formed in the surface region of the semiconductor silicon substrate
and surrounding the sidewalls and bottom of the first source region; and
a second ion-diffusion body of a second conductive type formed in the surface region of the semiconductor silicon substrate
and surrounding the sidewalls and bottom of the second source region;
wherein, the left periphery of the first lengthwise-extending area of the gate layer overlaps the periphery of the first ion-diffusion
body to form a first overlapping portion, and the right periphery of the second lengthwise-extending area of the gate layer
overlaps the periphery of the second ion-diffusion body to form a second overlapping portion.
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