| US 7,476,924 B2 | ||
| Semiconductor device having recessed landing pad and its method of fabrication | ||
| Je-Min Park, Gyeonggi-do (Korea, Republic of); and Ho-Jin Oh, Seoul (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Oct. 18, 2006, as Appl. No. 11/550,553. | ||
| Claims priority of application No. 10-2005-0098243 (KR), filed on Oct. 18, 2005. | ||
| Prior Publication US 2007/0152257 A1, Jul. 05, 2007 | ||
| Int. Cl. H01L 27/108 (2006.01) | ||
| U.S. Cl. 257—308 [257/298] | 11 Claims |
| 1. A semiconductor device, comprising:
a semiconductor substrate;
a lower interlayer dielectric layer disposed on the semiconductor substrate;
a first landing pad contacting the semiconductor substrate through the lower interlayer dielectric layer;
a second landing pad contacting the semiconductor substrate through the lower interlayer dielectric layer, and spaced apart
from the first landing pad;
a metal silicide layer formed on the second landing pad and disposed lower than a top surface of the first landing pad;
an intermediate interlayer dielectric layer disposed on the lower interlayer dielectric layer;
a conductive line disposed on the intermediate interlayer dielectric layer; and
a contact plug disposed between the conductive line and the metal silicide layer, wherein an upper end of the metal silicide
layer is located below the top surface of the first landing pad.
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