| US 7,476,898 B2 | ||
| Thin film and manufacturing method of the same | ||
| Mitsuma Oishi, Kanagawa (Japan); and Masayuki Uehara, Kanagawa (Japan) | ||
| Assigned to NEC LCD Technologies, Ltd., Kawasaki, Kanagawa (Japan) | ||
| Filed on Apr. 13, 2005, as Appl. No. 11/104,424. | ||
| Claims priority of application No. 2004-118881 (JP), filed on Apr. 14, 2004. | ||
| Prior Publication US 2005/0230685 A1, Oct. 20, 2005 | ||
| Int. Cl. H01L 21/84 (2006.01) | ||
| U.S. Cl. 257—72 [257/59; 257/E21.414; 257/E29.28; 257/E29.291; 438/149; 438/151] | 12 Claims |
| 1. A thin film transistor comprising:
an insulating substrate;
a gate electrode, a gate insulating film and first semiconductor film patterns, which are sequentially formed on the insulating
substrate;
second semiconductor film patterns including a high density impurity, which are provided separately on the first semiconductor
film patterns, and which face each other at both sides; and
a first electrode and a second electrode, each of which is formed on the second semiconductor film patterns which face each
other,
wherein an area of the first semiconductor film patterns between the first electrode and the second electrode configures a
channel portion of the thin film transistor; and
wherein the first semiconductor film patterns include a protruded portion protruding toward the outside from an end portion
of the second semiconductor film patterns such that the protruded portion is extended from the end portion located on a remote
side from the channel portion, and at least a part of the surface in the protruded portion of the first semiconductor film
patterns having a rougher surface compared with a surface of the first semiconductor film of the channel portion.
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