| US 7,476,601 B2 | ||
| Semiconductor structure having multilayer of polysilicon and display panel applied with the same | ||
| Chih-Wei Chao, Taipei (Taiwan); and Mao-Yi Chang, Taipei (Taiwan) | ||
| Assigned to A U Optronics Corp., (Taiwan) | ||
| Filed on Aug. 12, 2005, as Appl. No. 11/202,178. | ||
| Claims priority of application No. 94102194 A (TW), filed on Jan. 25, 2005. | ||
| Prior Publication US 2006/0163733 A1, Jul. 27, 2006 | ||
| Int. Cl. H01L 21/20 (2006.01); H01L 21/36 (2006.01) | ||
| U.S. Cl. 438—487 [257/74; 257/E21.134; 257/E21.535] | 9 Claims |
| 1. A method of manufacturing a semiconductor structure, comprising the steps of:
providing a substrate comprising a displaying region and a circuit driving region, wherein the display region has a first
area and a second area spaced apart by a gap, and a third area located between the first area and the second area;
forming a first patterned amorphous silicon layer on the first area and the second area of the substrate;
forming an insulating layer covering the first patterned amorphous silicon layer and the substrate, wherein the portion of
the insulating layer above the first and second areas is higher than the portion of the insulating layer above the third area;
forming a second amorphous silicon layer on the insulating layer; and
performing an annealing treatment by a laser forming a first patterned polysilicon layer on the first area and the second
area, and a second patterned polysilicon layer on the third area, wherein a direction of a grain boundary of the second patterned
polysilicon layer intersects a direction of the gap at an angle in a range from 5 degree to 85 degree.
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