| US 7,476,576 B2 | ||
| Method of fabricating a semiconductor device | ||
| Shunpei Yamazaki, Tokyo (Japan); and Hisashi Ohtani, Kanagawa (Japan) | ||
| Assigned to Semiconductor Energy Laboratory Co., Ltd., (Japan) | ||
| Filed on Aug. 09, 2004, as Appl. No. 10/914,357. | ||
| Application 09/808162 is a division of application No. 09/386782, filed on Aug. 31, 1999, granted, now 6,335,231, filed on Jan. 01, 2002. | ||
| Application 10/914357 is a continuation of application No. 09/808162, filed on Mar. 13, 2001, granted, now 6,803,264, filed on Oct. 12, 2004. | ||
| Claims priority of application No. 10-251635 (JP), filed on Sep. 04, 1998. | ||
| Prior Publication US 2005/0009252 A1, Jan. 13, 2005 | ||
| Int. Cl. H01L 21/84 (2006.01); H01L 21/30 (2006.01) | ||
| U.S. Cl. 438—151 [438/164; 438/458; 438/459; 257/E21.563; 257/E21.569] | 26 Claims |
| 1. A method of fabricating a semiconductor device, said method comprising the steps of:
forming an oxide layer on a single crystal semiconductor substrate having a main surface of a {110} plane;
forming a hydrogen-containing layer at a predetermined depth in the single crystal semiconductor substrate by adding hydrogen
into the single crystal semiconductor substrate from a side of the main surface through the oxide layer;
bonding the single crystal semiconductor substrate and a supporting substrate to each other;
separating the single crystal semiconductor substrate by a first heat treatment along the hydrogen-containing layer;
carrying out a second heat treatment at a temperature of 900 to 1200° C.; and
polishing a single crystal semiconductor layer remaining on the supporting substrate and having a main surface of a {110}
plane.
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