| US 7,474,582 B2 | ||
| Systems and methods for managing power | ||
| Hugh Thomas Mair, Fairview, Tex. (US); James Sangwon Song, Plano, Tex. (US); Franck Benjamin Dahan, Nice (France); William Douglas Wilson, Dallas, Tex. (US); Norman LeRoy Culp, Dallas, Tex. (US); and Sudha Thiruvengadam, Richardson, Tex. (US) | ||
| Assigned to Texas Instruments Incorporated, Dallas, Tex. (US) | ||
| Filed on Dec. 12, 2006, as Appl. No. 11/637,352. | ||
| Prior Publication US 2008/0137444 A1, Jun. 12, 2008 | ||
| Int. Cl. G11C 5/14 (2006.01); G11C 11/00 (2006.01); G11C 7/06 (2006.01) | ||
| U.S. Cl. 365—226 [365/154; 365/189.07; 365/189.09] | 21 Claims |
| 1. A system for managing power of a memory array, the system comprising:
a comparator configured to compare a first voltage with a reference voltage, the first voltage corresponding to an operating
voltage of at least one of a peripheral circuit associated with the memory away and a logic circuit configured to communicate
with the peripheral circuit, the reference voltage corresponding to a minimum threshold voltage for read/write operations
of the memory array;
selection circuitry configured to provide a selected signal based on the output of the comparator, the selected signal being
the greater of the first voltage and the reference voltage; and
an output circuit configured to provide an output voltage to the memory array in response to the selected signal, the output
voltage being the greater of the operating voltage of the at least one of the peripheral circuit and the logic circuit and
the minimum threshold voltage.
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