| US 7,474,545 B1 | ||
| Soft priority circuit and method for content addressable memory (CAM) device | ||
| Dinesh Maheshwari, Fremont, Calif. (US) | ||
| Assigned to NetLogic Microsystems, Inc., Mountain View, Calif. (US) | ||
| Filed on Jun. 13, 2006, as Appl. No. 11/453,164. | ||
| Claims priority of provisional application 60/689968, filed on Jun. 13, 2005. | ||
| Int. Cl. G11C 15/00 (2006.01) | ||
| U.S. Cl. 365—49.1 [365/49.17; 365/49.18] | 20 Claims |
| 1. A content addressable memory (CAM) device, comprising:
a plurality of CAM super-blocks each comprising a plurality of sub-blocks, each sub-block including a plurality of CAM entries
that generate match results in response to a key value; wherein
the CAM device includes, for each sub-block, storage for a programmable local priority value that establishes priority of
match results of the sub-block with respect to match results of the other sub-blocks of the same CAM super-block, and
a programmable global priority value, different from the programmable local priority value that establishes priority of match
indications of the sub-block with respect to match results of sub-blocks of the plurality of CAM super-blocks.
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