| Outline |
Indent Level
| |
| Color | Curly Brackets (indicating CPC extensions to IPC) | |
CPC | COOPERATIVE PATENT CLASSIFICATION | |||||
H01L 21/7682 | . . . . . | { the dielectric comprising air gaps} |
![]() | H01L 21/76822 | . . . . . | { Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.} { WARNING: Groups H01L 21/76822-H01L 21/76837 are not complete; see provisionally H01L 21/76801} |
H01L 21/76823 | . . . . . . | { transforming an insulating layer into a conductive layer} |
H01L 21/76825 | . . . . . . | { by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.(plasma treatment H01L 21/76826)} |
H01L 21/76826 | . . . . . . | { by contacting the layer with gases, liquids or plasmas} |
H01L 21/76828 | . . . . . . | { thermal treatment} |
![]() | H01L 21/76829 | . . . . . | { characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers} |
H01L 21/76831 | . . . . . . | { in via holes or trenches, e.g. non-conductive sidewall liners} |
H01L 21/76832 | . . . . . . | { Multiple layers} |
H01L 21/76834 | . . . . . . | { formation of thin insulating films on the sidewalls or on top of conductors (H01L 21/76831 takes precedence)} |
H01L 21/76835 | . . . . . | { Combinations of two or more different dielectric layers having a low dielectric constant (H01L 21/76832 takes precedence)} |
H01L 21/76837 | . . . . . | { Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics} |
![]() | H01L 21/76838 | . . . . | { characterised by the formation and the after-treatment of the conductors (etching for patterning the conductors H01L 21/3213)} NOTE -
|
H01L 21/7684 | . . . . . | { Smoothing; Planarisation} |
![]() | H01L 21/76841 | . . . . . | { Barrier, adhesion or liner layers} |
![]() | H01L 21/76843 | . . . . . . | { formed in openings in a dielectric} |
H01L 21/76844 | . . . . . . . | { Bottomless liners} |
H01L 21/76846 | . . . . . . . | { Layer combinations} |
H01L 21/76847 | . . . . . . . | { the layer being positioned within the main fill metal} |
H01L 21/76849 | . . . . . . . | { the layer being positioned on top of the main fill metal} |
![]() | H01L 21/7685 | . . . . . . |
![]() | H01L 21/76853 | . . . . . . | { characterized by particular after-treatment steps} |
![]() | H01L 21/76855 | . . . . . . . | { After-treatment introducing at least one additional element into the layer} |
H01L 21/76856 | . . . . . . . . | { by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner} |
H01L 21/76858 | . . . . . . . . | { by diffusing alloying elements} |
H01L 21/76859 | . . . . . . . . | { by ion implantation} |
![]() | H01L 21/76861 | . . . . . . . | { Post-treatment or after-treatment not introducing additional chemical elements into the layer} |
H01L 21/76862 | . . . . . . . . | { Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation} |
H01L 21/76864 | . . . . . . . . | { Thermal treatment} |
H01L 21/76865 | . . . . . . . |
H01L 21/76867 | . . . . . . | { characterized by methods of formation other than PVD, CVD or deposition from a liquids (PVD H01L 21/2855; CVD H01L 21/28556; deposition from liquids H01L 21/288)} |
H01L 21/76868 | . . . . . . | { Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films} |
H01L 21/7687 | . . . . . . | { Thin films associated with contacts of capacitors} |
![]() | H01L 21/76871 | . . . . . . | { Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers} |
![]() | H01L 21/76877 | . . . . . | { Filling of holes, grooves or trenches, e.g. vias, with conductive material} |
H01L 21/76879 | . . . . . . | { by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating (plating on semiconductors in general H01L 21/288)} |
H01L 21/7688 | . . . . . . | { by deposition over sacrificial masking layer, e.g. lift-off (lift-off per se H01L21/00B2)} |
H01L 21/76882 | . . . . . . | { Reflowing or applying of pressure to better fill the contact hole} |
H01L 21/76883 | . . . . . . | { Post-treatment or after-treatment of the conductive material} |
H01L 21/76885 | . . . . . | { By forming conductive members before deposition of protective insulating material, e.g. pillars, studs} |
![]() | H01L 21/76886 | . . . . . | { Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances} |
H01L 21/76888 | . . . . . . | { By rendering at least a portion of the conductor non conductive, e.g. oxidation} |
H01L 21/76889 | . . . . . . | { by forming silicides of refractory metals} |
H01L 21/76891 | . . . . . . | { by using supraconducting materials} |
![]() | H01L 21/76892 | . . . . . . | { modifying the pattern} |
H01L 21/76895 | . . . . . | { Local interconnects; Local pads, as exemplified by patent document EP0896365} |
H01L 21/76897 | . . . . | { Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step (self-aligned silicidation on field effect transistors H01L21/336M)} |
H01L 21/76898 | . . . . | { formed through a semiconductor substrate} |
![]() | H01L 21/77 | . . | Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate NOTE -
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![]() | H01L 21/78 | . . . | with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L 21/304) |
![]() | H01L 21/7806 | . . . . | { involving the separation of the active layers from a substrate} |
![]() | H01L 21/782 | . . . . | to produce devices, each consisting of a single circuit element (H01L 21/82 takes precedence) |
H01L 21/784 | . . . . . | the substrate being a semiconductor body |
H01L 21/786 | . . . . . | the substrate being other than a semiconductor body, e.g. insulating body |
![]() | H01L 21/82 | . . . . | to produce devices, e.g. integrated circuits, each consisting of a plurality of components |
H01L 21/8206 | . . . . . |
H01L 21/8213 | . . . . . |
![]() | H01L 21/822 | . . . . . | the substrate being a semiconductor, using silicon technology (H01L 21/8258 takes precedence) |
H01L 21/8221 | . . . . . . | { Three dimensional integrated circuits stacked in different levels} |
![]() | H01L 21/8222 | . . . . . . | Bipolar technology |
H01L 21/8224 | . . . . . . . | comprising a combination of vertical and lateral transistors |
H01L 21/8226 | . . . . . . . | comprising merged transistor logic or integrated injection logic |
![]() | H01L 21/8228 | . . . . . . . | Complementary devices, e.g. complementary transistors |
H01L 21/8229 | . . . . . . . | Memory structures |
![]() | H01L 21/8232 | . . . . . . | Field-effect technology |
![]() | H01L 21/8234 | . . . . . . . | MIS technology { , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type} |
H01L 21/823406 | . . . . . . . . | { Combination of charge coupled devices, i.e. CCD, or BBD} |
H01L 21/823412 | . . . . . . . . | { with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials} |
H01L 21/823425 | . . . . . . . . . | { manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures} |
H01L 21/823431 | . . . . . . . . | { with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET} |
![]() | H01L 21/823437 | . . . . . . . . | { with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes} |
H01L 21/823443 | . . . . . . . . . | { silicided or salicided gate conductors} |
H01L 21/82345 | . . . . . . . . . | { gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures} |
H01L 21/823456 | . . . . . . . . . | { gate conductors with different shapes, lengths or dimensions} |
H01L 21/823468 | . . . . . . . . | { with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape} |
H01L 21/823475 | . . . . . . . . | { interconnection or wiring or contact manufacturing related aspects} |
H01L 21/823481 | . . . . . . . . | { isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure} |
H01L 21/823487 | . . . . . . . . | { with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface (with a current flow parallel to the substrate surface H01L 21/823431)} |
H01L 21/823493 | . . . . . . . . | { with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation (BILLI)} |
H01L 21/8236 | . . . . . . . . | Combination of enhancement and depletion transistors |
![]() | H01L 21/8238 | . . . . . . . . | Complementary field-effect transistors, e.g. CMOS |
H01L 21/823807 | . . . . . . . . . | { with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials} |
H01L 21/823821 | . . . . . . . . . | { with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET} |
![]() | H01L 21/823828 | . . . . . . . . . | { with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes} |
H01L 21/823835 | . . . . . . . . . . | { silicided or salicided gate conductors} |
H01L 21/823842 | . . . . . . . . . . | { gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures} |
H01L 21/82385 | . . . . . . . . . . | { gate conductors with different shapes, lengths or dimensions} |
H01L 21/823864 | . . . . . . . . . | { with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape} |
H01L 21/823871 | . . . . . . . . . | { interconnection or wiring or contact manufacturing related aspects} |
H01L 21/823878 | . . . . . . . . . | { isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure} |
H01L 21/823885 | . . . . . . . . . | { with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface (with a current flow parallel to the substrate surface H01L 21/823821)} |
H01L 21/823892 | . . . . . . . . . | { with a particular manufacturing method of the wells or tubs, e.g. twin tubs, high energy well implants, buried implanted layers for lateral isolation (BILLI)} |
H01L 21/8239 | . . . . . . . . | Memory structures |
![]() | H01L 21/8248 | . . . . . . | Combination of bipolar and field-effect technology |
H01L 21/8252 | . . . . . | the substrate being a semiconductor, using III-V technology (H01L 21/8258 takes precedence) |
H01L 21/8254 | . . . . . | the substrate being a semiconductor, using II-VI technology (H01L 21/8258 takes precedence) |
H01L 21/8256 | . . . . . | the substrate being a semiconductor, using technologies not covered by one of groups { H01L 21/8206, H01L 21/8213} , H01L 21/822, H01L 21/8252 and H01L 21/8254
(H01L 21/8258 takes precedence) |
H01L 21/8258 | . . . . . | the substrate being a semiconductor, using a combination of technologies covered by {
H01L 21/8206, H01L 21/8213} , H01L 21/822, H01L 21/8252, H01L 21/8254 or H01L 21/8256
|
![]() | H01L 21/84 | . . . . . | the substrate being other than a semiconductor body, e.g. being an insulating body |
![]() | H01L 22/00 | { Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor (detecting or counting or handling H01L 21/67005; marks applied to semiconductor devices H01L 23/544; testing methods or structures peculiar to devices provided for in groups H01L 31/00 to H01L 51/00, see these groups; investigating or analysing materials by the use of optical means G01N 21/00; testing electrical properties of individual semiconductor devices G01R 31/26; testing of photovoltaic systems H02S 50/00)} |
![]() | H01L 22/10 | . | { Measuring as part of the manufacturing process (burn-in G01R31/28C8)} |
H01L 22/12 | . . | { for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions (electrical measurement of diffusions H01L 22/14)} |
H01L 22/14 | . . | { for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means} |
![]() | H01L 22/20 | . | { Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps} |
H01L 22/22 | . . | { Connection or disconnection of sub-entities or redundant parts of a device in response to a measurement (testing and repair of stores after manufacture including at wafer scale G11C 29/00; fuses per se H01L 23/525)} |
H01L 22/24 | . . | { Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change (voltage contrast G01R 31/311)} |
H01L 22/26 | . . | { Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement (endpoint detection arrangements in CMP apparatus B24B 37/013, in discharge apparatus H01J37/32D1C1)} |
![]() | H01L 22/30 | . | { Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements} |
H01L 22/32 | . . | { Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors (arrangements for conducting electric current to or from the solid state body in operation H01L 23/48)} |
H01L 22/34 | . . | { Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line (switching, multiplexing, gating devices G01R 19/25; process control with lithography, e.g. dose control, G03F 7/20; structures for alignment control by optical means G03F7/20T8)} |
![]() | H01L 23/00 | Details of semiconductor or other solid state devices (H01L 25/00 takes precedence; { structural arrangements for testing or measuring during manufacture or treatment, or for reliability measurements H01L 22/00; arrangements for connecting or disconnecting semiconductor or solid-state bodies, or methods related thereto H01L 24/00; finger print sensors G06K 9/00006} )NOTE -
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![]() | H01L 23/02 | . | Containers; Seals (H01L 23/12, H01L 23/34, H01L 23/48, H01L 23/552, { H01L 23/66} take precedence; { for memories G11C} ) |
![]() | H01L 23/04 | . . | characterised by the shape { of the container or parts, e.g. caps, walls} |
H01L 23/041 | . . . | { the container being a hollow construction having no base used as a mounting for the semiconductor body} |
![]() | H01L 23/043 | . . . | the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body |
H01L 23/045 | . . . . | the other leads having an insulating passage through the base |
H01L 23/047 | . . . . | the other leads being parallel to the base |
H01L 23/049 | . . . . | the other leads being perpendicular to the base |
H01L 23/051 | . . . . | another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type |
![]() | H01L 23/053 | . . . | the container being a hollow construction and having an insulating { or insulated} base as a mounting for the semiconductor body |
![]() | H01L 23/06 | . . | characterised by the material of the container or its electrical properties |
H01L 23/10 | . . | characterised by the material or arrangement of seals between parts,ween cap e.g. between cap and base of the container or between leads and walls of the container |
![]() | H01L 23/12 | . | Mountings, e.g. non-detachable insulating substrates |
H01L 23/13 | . . | characterised by the shape |
![]() | H01L 23/14 | . . |
![]() | H01L 23/16 | . | Fillings or auxiliary members in containers { or encapsulations} , e.g. centering rings (H01L 23/42, H01L 23/552 take precedence) |
![]() | H01L 23/18 | . . | Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device |
![]() | H01L 23/28 | . | Encapsulations, e.g. encapsulating layers, coatings, { e.g. for protection} (H01L 23/552 takes precedence; { insulating layers for contacts or interconnections H01L 23/5329} ) |
![]() | H01L 23/29 | . . |
H01L 23/291 | . . . | { Oxides or nitrides or carbides, e.g. ceramics, glass} |
![]() | H01L 23/293 | . . . | { Organic, e.g. plastic} |
H01L 23/298 | . . . | { Semiconductor material, e.g. amorphous silicon} |
![]() | H01L 23/31 | . . | characterised by the arrangement { or shape} |
![]() | H01L 23/3107 | . . . | { the device being completely enclosed} |
H01L 23/3114 | . . . . | { the device being a chip scale package, e.g. CSP} |
![]() | H01L 23/3121 | . . . . | { a substrate forming part of the encapsulation} |
H01L 23/3135 | . . . . | { Double encapsulation or coating and encapsulation} |
H01L 23/3142 | . . . . | { Sealing arrangements between parts, e.g. adhesion promotors} |
H01L 23/315 | . . . . | { the encapsulation having a cavity} |
![]() | H01L 23/3157 | . . . |
H01L 23/3164 | . . . . | { the coating being a foil} |
H01L 23/3171 | . . . . | { the coating being directly applied to the semiconductor body, e.g. passivation layer (H01L 23/3178 takes precedence)} |
H01L 23/3178 | . . . . | { Coating or filling in grooves made in the semiconductor body} |
H01L 23/3185 | . . . . | { the coating covering also the sidewalls of the semiconductor body} |
H01L 23/3192 | . . . . | { Multilayer coating} |
H01L 23/32 | . | Holders for supporting the complete device in operation, i.e. detachable fixtures (H01L 23/40 takes precedence; connectors, { e.g. sockets} , in general H01R; for printed circuits H05K) |
![]() | H01L 23/34 | . | Arrangements for cooling, heating, ventilating or temperature compensation; { Temperature sensing arrangements (thermal treatment apparatus H01L 21/00)} |
H01L 23/345 | . . |
![]() | H01L 23/36 | . . | Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks { (H01L 23/28, H01L 23/40, H01L 23/42, H01L 23/44, H01L 23/46 take precedence; heating H01L 23/345)} |
![]() | H01L 23/367 | . . . | Cooling facilitated by shape of device { (H01L 23/38, H01L 23/40, H01L 23/42, H01L 23/44, H01L 23/46 take precedence)} |
H01L 23/3672 | . . . . |
H01L 23/3675 | . . . . | { characterised by the shape of the housing} |
H01L 23/3677 | . . . . | { Wire-like or pin-like cooling fins or heat sinks} |
![]() | H01L 23/373 | . . . | Cooling facilitated by selection of materials for the device { or materials for thermal expansion adaptation, e.g. carbon} |
H01L 23/3731 | . . . . | { Ceramic materials or glass (H01L 23/3732, H01L 23/3733, H01L 23/3735, H01L 23/3737, H01L 23/3738 take precedence)} |
H01L 23/3732 | . . . . | { Diamonds} |
H01L 23/3733 | . . . . | { having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures (H01L 23/3732, H01L 23/3737 take precedence)} |
H01L 23/3735 | . . . . | { Laminates or multilayers, e.g. direct bond copper ceramic substrates} |
H01L 23/3736 | . . . . | { Metallic materials (H01L 23/3732, H01L 23/3733, H01L 23/3735, H01L 23/3737, H01L 23/3738 take precedence)} |
H01L 23/3737 | . . . . | { Organic materials with or without a thermoconductive filler} |
H01L 23/3738 | . . . . | { Semiconductor materials} |
H01L 23/38 | . . | Cooling arrangements using the Peltier effect |
![]() | H01L 23/40 | . . | Mountings or securing means for detachable cooling or heating arrangements { (heating H01L 23/345); fixed by friction, plugs or springs} |
![]() | H01L 23/4006 | . . . | { with bolts or screws} |
H01L 23/4093 | . . . | { Snap-on arrangements, e.g. clips} |
![]() | H01L 23/42 | . . | Fillings or auxiliary members in containers { or encapsulations} selected or arranged to facilitate heating or cooling ({ heating H01L 23/345} ; characterised by selection of materials for the device H01L 23/373) |
![]() | H01L 23/427 | . . . |
![]() | H01L 23/433 | . . . | Auxiliary members { in containers} characterised by their shape, e.g. pistons |
![]() | H01L 23/44 | . . | the complete device being wholly immersed in a fluid other than air { (H01L 23/427 takes precedence)} |
![]() | H01L 23/46 | . . | involving the transfer of heat by flowing fluids (H01L 23/42, H01L 23/44 take precedence) |
![]() | H01L 23/48 | . | Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements (in general H01R); { Selection of materials therefor} NOTE -
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H01L 23/481 | . . | { Internal lead connections, e.g. via connections, feedthrough structures} |
![]() | H01L 23/482 | . . | consisting of lead-in layers inseparably applied to the semiconductor body { (electrodes H01L 29/40)} WARNING -
|
H01L 23/4821 | . . . | { Bridge structure with air gap} |
H01L 23/4822 | . . . | { Beam leads} |
H01L 23/4824 | . . . | { Pads with extended contours, e.g. grid structure, branch structure, finger structure} |
H01L 23/4825 | . . . | { for devices consisting of semiconductor layers on insulating or semi-insulating substrates, e.g. silicon on sapphire devices, i.e. SOS} |
![]() | H01L 23/4827 | . . . | { Materials} |
![]() | H01L 23/485 | . . . | consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts { (H01L 23/4821, H01L 23/4822, H01L 23/4824, H01L 23/4825 take precedence; materials H01L 23/532, bond pads H01L 24/02, bump connectors H01L 24/10)} WARNING -
|
![]() | H01L 23/488 | . . |
H01L 23/49 | . . . | Wire-like { arrangements or pins or rods (using optical fibres H01L 23/48; pins attached to insulating substrates H01L 23/49811)} WARNING -
|
![]() | H01L 23/492 | . . . | Bases or plates { or solder therefor} |
H01L 23/4922 | . . . . | { having a heterogeneous or anisotropic structure} |
![]() | H01L 23/4924 | . . . . | { characterised by the materials} |
![]() | H01L 23/495 | . . . | Lead-frames { or other flat leads (H01L 23/498 takes precedence; lead frame interconnections between components H01L 23/52)} |
![]() | H01L 23/49503 | . . . . | { characterised by the die pad} |
H01L 23/49506 | . . . . . | { an insulative substrate being used as a diepad, e.g. ceramic, plastic (H01L 23/49531 takes precedence)} |
H01L 23/4951 | . . . . . | { Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad} |
H01L 23/49513 | . . . . . | { having bonding material between chip and die pad} |
![]() | H01L 23/49517 | . . . . | { Additional leads} |
H01L 23/4952 | . . . . . | { the additional leads being a bump or a wire} |
H01L 23/49524 | . . . . . | { the additional leads being a tape carrier or flat leads} |
H01L 23/49527 | . . . . . | { the additional leads being a multilayer} |
H01L 23/49531 | . . . . . | { the additional leads being a wiring board} |
H01L 23/49534 | . . . . | { Multi-layer} |
H01L 23/49537 | . . . . | { Plurality of lead frames mounted in one device} |
![]() | H01L 23/49541 | . . . . | { Geometry of the lead-frame} |
H01L 23/49544 | . . . . . | { Deformation absorbing parts in the lead frame plane, e.g. meanderline shape (H01L 23/49562 takes precedence)} |
![]() | H01L 23/49548 | . . . . . |
H01L 23/49558 | . . . . . | { Insulating layers on lead frames, e.g. bridging members} |
H01L 23/49562 | . . . . . |
H01L 23/49565 | . . . . . | { Side rails of the lead frame, e.g. with perforations, sprocket holes} |
H01L 23/49568 | . . . . | { specifically adapted to facilitate heat dissipation} |
H01L 23/49572 | . . . . | { consisting of thin flexible metallic tape with or without a film carrier (H01L 23/49503 to H01L 23/49568 and H01L 23/49575 to H01L 23/49579 take precedence)} |
H01L 23/49575 | . . . . | { Assemblies of semiconductor devices on lead frames} |
![]() | H01L 23/49579 | . . . . | { characterised by the materials of the lead frames or layers thereon} |
H01L 23/49582 | . . . . . | { Metallic layers on lead frames} |
H01L 23/49586 | . . . . . | { Insulating layers on lead frames} |
H01L 23/49589 | . . . . | { Capacitor integral with or on the leadframe} |
H01L 23/49593 | . . . . | { Battery in combination with a leadframe} |
H01L 23/49596 | . . . . | { Oscillators in combination with lead-frames} |
![]() | H01L 23/498 | . . . | Leads, { i.e. metallisations or lead-frames} on insulating substrates, { e.g. chip carriers (shape of the substrate H01L 23/13)} |
H01L 23/49805 | . . . . | { the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting} |
![]() | H01L 23/49811 | . . . . | { Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads (H01L 23/49827 takes precedence)} |
H01L 23/49816 | . . . . . | { Spherical bumps on the substrate for external connection, e.g. ball grid arrays (BGA)} |
H01L 23/49822 | . . . . |
H01L 23/49827 | . . . . | { Via connections through the substrates, e.g. pins going through the substrate, coaxial cables (H01L 23/49822, H01L 23/49833, H01L 23/4985, H01L 23/49861 take precedence)} |
H01L 23/49833 | . . . . | { the chip support structure consisting of a plurality of insulating substrates} |
![]() | H01L 23/49838 | . . . . | { Geometry or layout} |
H01L 23/4985 | . . . . |
H01L 23/49855 | . . . . |
H01L 23/49861 | . . . . | { Lead-frames fixed on or encapsulated in insulating substrates (H01L 23/4985, H01L 23/49805 take precedence)} |
![]() | H01L 23/49866 | . . . . | { characterised by the materials (materials of the substrates H01L 23/14, of the lead-frames H01L 23/49579)} |
H01L 23/49872 | . . . . . | { the conductive materials containing semiconductor material} |
H01L 23/49877 | . . . . . |
H01L 23/49883 | . . . . . | { the conductive materials containing organic materials or pastes, e.g. for thick films (for printed circuits H05K 1/092)} |
H01L 23/49888 | . . . . . | { the conductive materials containing superconducting material} |
H01L 23/49894 | . . . . . | { Materials of the insulating layers or coatings} |
H01L 23/50 | . . | for integrated circuit devices, { e.g. power bus, number of leads} (H01L 23/482 to H01L 23/498 take precedence) |
![]() | H01L 23/52 | . | Arrangements for conducting electric current within the device in operation from one component to another, { i.e. interconnections, e.g. wires, lead frames (optical interconnections G02B 6/00)} |
![]() | H01L 23/522 | . . | including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body |
H01L 23/5221 | . . . | { Crossover interconnections} |
![]() | H01L 23/5222 | . . . | { Capacitive arrangements or effects of, or between wiring layers (other capacitive arrangements H01L 23/642)} |
H01L 23/5223 | . . . . | { Capacitor integral with wiring layers} |
H01L 23/5225 | . . . . | { Shielding layers formed together with wiring layers} |
H01L 23/5226 | . . . | { Via connections in a multilevel interconnection structure} |
H01L 23/5227 | . . . | { Inductive arrangements or effects of, or between, wiring layers (other inductive arrangements H01L 23/645)} |
H01L 23/5228 | . . . | { Resistive arrangements or effects of, or between, wiring layers (other resistive arrangements H01L 23/647)} |
![]() | H01L 23/525 | . . . | with adaptable interconnections |
![]() | H01L 23/5252 | . . . . | { comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive} |
H01L 23/5254 | . . . . . | { the change of state resulting from the use of an external beam, e.g. laser beam or ion beam} |
![]() | H01L 23/5256 | . . . . | { comprising fuses, i.e. connections having their state changed from conductive to non-conductive} |
![]() | H01L 23/528 | . . . | { Geometry or} layout of the interconnection structure { (H01L 27/0207 takes precedence; algorithms G06F 17/50)} |
H01L 23/5283 | . . . . | { Cross-sectional geometry} |
H01L 23/5286 | . . . . | { Arrangements of power or ground buses} |
![]() | H01L 23/532 | . . . | characterised by the materials |
![]() | H01L 23/53204 | . . . . | { Conductive materials} |
![]() | H01L 23/53209 | . . . . . |
![]() | H01L 23/53214 | . . . . . . | { the principal metal being aluminium} |
H01L 23/53219 | . . . . . . . | { Aluminium alloys} |
H01L 23/53223 | . . . . . . . | { Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers} |
![]() | H01L 23/53228 | . . . . . . | { the principal metal being copper} |
H01L 23/53233 | . . . . . . . | { Copper alloys} |
H01L 23/53238 | . . . . . . . | { Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers} |
![]() | H01L 23/53242 | . . . . . . | { the principal metal being a noble metal, e.g. gold} |
H01L 23/53247 | . . . . . . . | { Noble-metal alloys} |
H01L 23/53252 | . . . . . . . | { Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers} |
![]() | H01L 23/53257 | . . . . . . | { the principal metal being a refractory metal} |
H01L 23/53271 | . . . . . | { containing semiconductor material, e.g. polysilicon} |
H01L 23/53276 | . . . . . |
H01L 23/5328 | . . . . . | { containing conductive organic materials or pastes, e.g. conductive adhesives, inks} |
H01L 23/53285 | . . . . . | { containing superconducting materials} |
![]() | H01L 23/5329 | . . . . | { Insulating materials} |
H01L 23/535 | . . | including internal interconnections, e.g. cross-under constructions { (internal lead connections H01L 23/481)} |
![]() | H01L 23/538 | . . | the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ( { H05K takes precedence; manufacture or treatment H01L 21/4846} ; mountings per se H01L 23/12; { materials H01L 23/49866} ) |
H01L 23/5381 | . . . | { Crossover interconnections, e.g. bridge stepovers} |
H01L 23/5382 | . . . | { Adaptable interconnections, e.g. for engineering changes} |
H01L 23/5383 | . . . | { Multilayer substrates (H01L 23/5385 takes precedence; multilayer metallisation on monolayer substrates H01L 23/538)} |
H01L 23/5384 | . . . | { Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (H01L 23/5383, H01L 23/5385 take precedence; pins attached to insulating substrates H01L 23/49811)} |
H01L 23/5385 | . . . | { Assembly of a plurality of insulating substrates} |
H01L 23/5386 | . . . | { Geometry or layout of the interconnection structure} |
H01L 23/5387 | . . . |
H01L 23/5388 | . . . |
H01L 23/5389 | . . . | { the chips being integrally enclosed by the interconnect and support structures} |
H01L 23/544 | . | Marks applied to semiconductor devices { or parts} , e.g. registration marks, { alignment structures, wafer maps (test patterns for characterising or monitoring manufacturing processes H01L 22/00)} NOTE -
|
![]() | H01L 23/552 | . | Protection against radiation, e.g. light { or electromagnetic waves} |
H01L 23/562 | . |
H01L 23/564 | . |
![]() | H01L 23/57 | . | { Protection from inspection, reverse engineering or tampering} |
![]() | H01L 23/58 | . | Structural electrical arrangements for semiconductor devices not otherwise provided for, { e.g. in combination with batteries (H01L 23/49593, H01L 23/49596 take precedence)} |
H01L 23/585 | . . | { comprising conductive layers or plates or strips or rods or rings (H01L 23/60, H01L 23/62, H01L 23/64, H01L 23/66 take precedence)} |
H01L 23/60 | . . | Protection against electrostatic charges or discharges, e.g. Faraday shields (in general H05F) |
H01L 23/62 | . . | Protection against overvoltage, e.g. fuses, shunts |
![]() | H01L 23/64 | . . | Impedance arrangements |
H01L 23/642 | . . . | { Capacitive arrangements (H01L 23/49589, H01L 23/645, H01L 23/647, H01L 23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L 23/5222)} |
H01L 23/645 | . . . |
H01L 23/647 | . . . |
H01L 23/66 | . . . | High-frequency adaptations NOTE -
|
![]() | H01L 24/00 | { Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto} NOTE -
WARNING -
|
![]() | H01L 24/01 | . | { Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto} WARNING -
|
![]() | H01L 24/02 | . . | { Bonding areas (on insulating substrates, e.g. chip carriers, H01L 23/49816, H01L 23/49838, H01L 23/5389); Manufacturing methods related thereto} WARNING -
|
H01L 24/03 | . . . | { Manufacturing methods} |
![]() | H01L 24/04 | . . . | { Structure, shape, material or disposition of the bonding areas prior to the connecting process} |
H01L 24/05 | . . . . | { of an individual bonding area} |
H01L 24/06 | . . . . | { of a plurality of bonding areas} |
![]() | H01L 24/07 | . . . | { Structure, shape, material or disposition of the bonding areas after the connecting process} |
![]() | H01L 24/10 | . . | { Bump connectors (bumps on insulating substrates, e.g. chip carriers, H01L 23/49816); Manufacturing methods related thereto} WARNING - |
H01L 24/11 | . . . |
![]() | H01L 24/12 | . . . | { Structure, shape, material or disposition of the bump connectors prior to the connecting process} |
H01L 24/13 | . . . . | { of an individual bump connector} |
H01L 24/14 | . . . . | { of a plurality of bump connectors} |
![]() | H01L 24/15 | . . . | { Structure, shape, material or disposition of the bump connectors after the connecting process} |
![]() | H01L 24/18 | . . | { High density interconnect [HDI} connectors; Manufacturing methods related thereto (interconnection structure between a plurality of semiconductor chips H01L 23/5389)] WARNING -
|
H01L 24/19 | . . . | { Manufacturing methods of high density interconnect preforms} |
H01L 24/20 | . . . | { Structure, shape, material or disposition of high density interconnect preforms} |
![]() | H01L 24/23 | . . . | { Structure, shape, material or disposition of the high density interconnect connectors after the connecting process} |
![]() | H01L 24/26 | . . | { Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto} |
H01L 24/27 | . . . | { Manufacturing methods} |
![]() | H01L 24/28 | . . . | { Structure, shape, material or disposition of the layer connectors prior to the connecting process} |
H01L 24/29 | . . . . | { of an individual layer connector} |
H01L 24/30 | . . . . | { of a plurality of layer connectors} |
![]() | H01L 24/31 | . . . | { Structure, shape, material or disposition of the layer connectors after the connecting process} |
![]() | H01L 24/34 | . . | { Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto} WARNING -
|
H01L 24/35 | . . . | { Manufacturing methods} |
![]() | H01L 24/36 | . . . | { Structure, shape, material or disposition of the strap connectors prior to the connecting process} |
H01L 24/37 | . . . . | { of an individual strap connector} |
H01L 24/38 | . . . . | { of a plurality of strap connectors} |
![]() | H01L 24/39 | . . . | { Structure, shape, material or disposition of the strap connectors after the connecting process} |
![]() | H01L 24/42 | . . | { Wire connectors; Manufacturing methods related thereto} WARNING - |
H01L 24/43 | . . . | { Manufacturing methods} |
![]() | H01L 24/44 | . . . | { Structure, shape, material or disposition of the wire connectors prior to the connecting process} |
H01L 24/45 | . . . . | { of an individual wire connector} |
H01L 24/46 | . . . . | { of a plurality of wire connectors} |
![]() | H01L 24/47 | . . . | { Structure, shape, material or disposition of the wire connectors after the connecting process} |
H01L 24/50 | . . | { Tape automated bonding [TAB} connectors, i.e. film carriers; Manufacturing methods related thereto (thin flexible metallic tape with or without a film carrier H01L 23/49572, flexible insulating substrates H01L 23/4985, H01L 23/5387)] |
![]() | H01L 24/63 | . . | { Connectors not provided for in any of the groups H01L 24/10 to H01L 24/50 and subgroups; Manufacturing methods related thereto} |
![]() | H01L 24/71 | . | { Means for bonding not being attached to, or not being formed on, the surface to be connected (holders for supporting the complete device in operation H01L 23/32)} |
H01L 24/72 | . . | { Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips} |
H01L 24/73 | . | { Means for bonding being of different types provided for in two or more of groups H01L 24/10, H01L 24/18, H01L 24/26, H01L 24/34, H01L 24/42, H01L 24/50, H01L 24/63, H01L 24/71} |
![]() | H01L 24/74 | . | { Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies} |
![]() | H01L 24/741 | . . | { Apparatus for manufacturing means for bonding, e.g. connectors} |
H01L 24/742 | . . . | { Apparatus for manufacturing bump connectors} |
H01L 24/743 | . . . | { Apparatus for manufacturing layer connectors} |
H01L 24/744 | . . . | { Apparatus for manufacturing strap connectors} |
H01L 24/745 | . . . | { Apparatus for manufacturing wire connectors} |
H01L 24/75 | . . | { Apparatus for connecting with bump connectors or layer connectors} |
H01L 24/76 | . . | { Apparatus for connecting with build-up interconnects} |
H01L 24/77 | . . | { Apparatus for connecting with strap connectors} |
H01L 24/78 | . . | { Apparatus for connecting with wire connectors} |
H01L 24/79 | . . | { Apparatus for Tape Automated Bonding [TAB]} |
H01L 24/799 | . . | { Apparatus for disconnecting} |
H01L 24/81 | . . | { using a bump connector} WARNING -
|
H01L 24/82 | . . | { by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI} (interconnection structure between a plurality of semiconductor chips H01L 23/5389)] |
H01L 24/83 | . . | { using a layer connector} WARNING -
|
H01L 24/84 | . . | { using a strap connector} |
H01L 24/85 | . . |
H01L 24/86 | . . | { using tape automated bonding [TAB} ] |
H01L 24/89 | . . |
H01L 24/90 | . | { Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips} WARNING -
|
![]() | H01L 24/91 | . | { Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L 24/80 to H01L 24/90} |
![]() | H01L 24/93 | . | { Batch processes} |
H01L 24/94 | . . | { at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices} |
![]() | H01L 24/95 | . . | { at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips} |
H01L 24/96 | . . . | { the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting} |
H01L 24/97 | . . . | { the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting} |
H01L 24/98 | . | { Methods for disconnecting semiconductor or solid-state bodies} |
![]() | H01L 25/00 | Assemblies consisting of a plurality of individual semiconductor or other solid state devices { ; Multistep manufacturing processes thereof} ({ lead frames with assemblies of semiconductor devices thereon H01L 23/49575; assembling semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L 21/06 to H01L 21/326, e.g. sealing of a cap to a base of a container, H01L 21/50} ; devices consisting of a plurality of solid state components formed in or on a common substrate H01L 27/00; assemblies of photoelectric cells H01L 31/042, {
H01G 9/20} ; generators using solar cells or solar panels { H02S} ; details of complete circuit assemblies for which provision exists in another subclass, e.g. details of television receivers, see the relevant subclass, e.g. H04N; details of assemblies of electrical components in general H05K) |
![]() | H01L 25/03 | . | all the devices being of a type provided for in the same subgroup of groups H01L 27/00 to H01L 51/00, e.g. assemblies of rectifier diodes |
![]() | H01L 25/04 | . . | the devices not having separate containers |
![]() | H01L 25/041 | . . . |
![]() | H01L 25/046 | . . . |
H01L 25/047 | . . . . | { the devices being of a type provided for in group H01L 51/42, e.g. photovoltaic modules based on organic solar cells} |
H01L 25/048 | . . . . | { the devices being of a type provided for in group H01L 51/50 , e.g. assembly of organic light emitting devices} |
![]() | H01L 25/065 | . . . | the devices being of a type provided for in group H01L 27/00 |
H01L 25/0652 | . . . . | { the devices being arranged next and on each other, i.e. mixed assemblies} |
H01L 25/0655 | . . . . | { the devices being arranged next to each other} |
H01L 25/0657 | . . . . | { Stacked arrangements of devices} |
![]() | H01L 25/07 | . . . | the devices being of a type provided for in group H01L 29/00 |
H01L 25/071 | . . . . | { the devices being arranged next and on each other, i.e. mixed assemblies} |
H01L 25/072 | . . . . | { the devices being arranged next to each other} |
H01L 25/073 | . . . . | { Apertured devices mounted on one or more rods passed through the apertures} |
H01L 25/074 | . . . . | { Stacked arrangements of non-apertured devices} |
![]() | H01L 25/075 | . . . | the devices being of a type provided for in group H01L 33/00 |
![]() | H01L 25/10 | . . | the devices having separate containers |
H01L 25/105 | . . . | NOTE -
|
![]() | H01L 25/11 | . . . | the devices being of a type provided for in group H01L 29/00 |
H01L 25/112 | . . . . | { Mixed assemblies} |
H01L 25/115 | . . . . | { the devices being arranged next to each other} |
H01L 25/117 | . . . . | { Stacked arrangements of devices} |
H01L 25/13 | . . . | the devices being of a type provided for in group H01L 33/00 |
![]() | H01L 25/16 | . | the devices being of types provided for in two or more different main groups ofH01L 27/00 toH01L 49/00
{ andH01L 51/00
} , e.g. forming hybrid circuits{ (interconnections for hybrid circuitsH01L 23/5389
)} |
H01L 25/162 | . . | { the devices being mounted on two or more different substrates} |
H01L 25/165 | . . | { Containers} |
H01L 25/167 | . . | { comprising optoelectronic devices, e.g. LED, photodiodes} |
H01L 25/18 | . | the devices being of types provided for in two or more different subgroups of the same main group of groups H01L 27/00 to H01L 51/00
{ (comprising devices provided for in H01L 27/144 and subgroups, see H01L 27/144 and subgroups)} |
H01L 25/50 | . | { Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L 27/00 or H01L 29/00
(H01L 21/50 takes precedence)} |
![]() | H01L 27/00 | Devices consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate (processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof H01L 21/70, H01L 31/00 to H01L 51/00; details thereof H01L 23/00, H01L 29/00 to H01L 51/00; assemblies consisting of a plurality of individual solid state devices H01L 25/00; assemblies of electrical components in general H05K) NOTE -
|
![]() | H01L 27/01 | . | comprising only passive thin-film or thick-film elements formed on a common insulating substrate { (passive two-terminal components without a potential-jump or surface barrier for integrated circuits, details thereof and multistep manufacturing processes therefor H01L 28/00)} NOTE -
|
![]() | H01L 27/02 | . | including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier |
![]() | H01L 27/0203 | . . | { Particular design considerations for integrated circuits} |
![]() | H01L 27/0207 | . . . | { Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique} |
![]() | H01L 27/0214 | . . . | { for internal polarisation, e.g. I2L} |
![]() | H01L 27/0218 | . . . . | { of field effect structures} |
H01L 27/0222 | . . . . . |
H01L 27/0225 | . . . . . | { Charge injection in static induction transistor logic structures, i.e. SITL (circuits H03K 19/0912)} |
![]() | H01L 27/0229 | . . . . | { of bipolar structures} |
![]() | H01L 27/0248 | . . . | { for electrical or thermal protection, e.g. electrostatic discharge [ESD} protection (emergency protective circuit arrangements H02H; circuit arrangements for protecting electronic switches H03K 17/08; circuit arrangements for protecting logic circuits H03K 19/003)] |
![]() | H01L 27/0251 | . . . . | { for MOS devices} |
H01L 27/0255 | . . . . . | { using diodes as protective elements (diode connected field effect transistors H01L 27/0266; diode connected bipolar transistors H01L 27/0259)} |
![]() | H01L 27/0259 | . . . . . | { using bipolar transistors as protective elements} |
H01L 27/0262 | . . . . . . | { including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR} devices] |
![]() | H01L 27/0266 | . . . . . | { using field effect transistors as protective elements} |
![]() | H01L 27/027 | . . . . . . | { specially adapted to provide an electrical current path other than the field effect induced current path} |
H01L 27/0274 | . . . . . . . | { involving a parasitic bipolar transistor triggered by the electrical biasing of the gate electrode of the field effect transistor, e.g. gate coupled transistors} |
H01L 27/0277 | . . . . . . . | { involving a parasitic bipolar transistor triggered by the local electrical biasing of the layer acting as base of said parasitic bipolar transistor} |
H01L 27/0281 | . . . . . . | { field effect transistors in a "Darlington-like" configuration} |
H01L 27/0285 | . . . . . . | { bias arrangements for gate electrode of field effect transistors, e.g. RC networks, voltage partitioning circuits (H01L 27/0281 takes precedence)} |
H01L 27/0288 | . . . . . | { using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps} |
H01L 27/0292 | . . . . . | { using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses} |
H01L 27/0296 | . . . . . | { involving a specific disposition of the protective devices} |
![]() | H01L 27/04 | . . | the substrate being a semiconductor body |
![]() | H01L 27/06 | . . . | including a plurality of individual components in a non-repetitive configuration |
H01L 27/0605 | . . . . | { integrated circuits made of compound material, e.g. AIIIBV} |
![]() | H01L 27/0611 | . . . . | { integrated circuits having a two-dimensional layout of components without a common active region} |
![]() | H01L 27/0617 | . . . . . |
H01L 27/0623 | . . . . . . | { in combination with bipolar transistors} |
H01L 27/0629 | . . . . . . | { in combination with diodes, or resistors, or capacitors} |
H01L 27/0635 | . . . . . . | { in combination with bipolar transistors and diodes, or resistors, or capacitors} |
![]() | H01L 27/0641 | . . . . . | { without components of the field effect type} |
![]() | H01L 27/0647 | . . . . . . | { Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor} |
![]() | H01L 27/0652 | . . . . . . . | { Vertical bipolar transistor in combination with diodes, or capacitors, or resistors} |
H01L 27/0658 | . . . . . . . . | { Vertical bipolar transistor in combination with resistors or capacitors} |
H01L 27/0664 | . . . . . . . . | { Vertical bipolar transistor in combination with diodes} |
H01L 27/067 | . . . . . . . | { Lateral bipolar transistor in combination with diodes, or capacitors, or resistors} |
![]() | H01L 27/0676 | . . . . . . | { comprising combinations of diodes, or capacitors or resistors} |
![]() | H01L 27/0688 | . . . . | { Integrated circuits having a three-dimensional layout} |
![]() | H01L 27/07 | . . . . | the components having an active region in common |
![]() | H01L 27/0705 | . . . . . | { comprising components of the field effect type} |
![]() | H01L 27/0711 | . . . . . . | { in combination with bipolar transistors and diodes, or capacitors, or resistors} |
H01L 27/0716 | . . . . . . . | { in combination with vertical bipolar transistors and diodes, or capacitors, or resistors} |
H01L 27/0722 | . . . . . . . | { in combination with lateral bipolar transistors and diodes, or capacitors, or resistors} |
![]() | H01L 27/0727 | . . . . . . | { in combination with diodes, or capacitors or resistors} |
![]() | H01L 27/0744 | . . . . . | { without components of the field effect type} |
![]() | H01L 27/075 | . . . . . . | { Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor} |
![]() | H01L 27/0755 | . . . . . . . | { Vertical bipolar transistor in combination with diodes, or capacitors, or resistors} |
![]() | H01L 27/0761 | . . . . . . . . | { Vertical bipolar transistor in combination with diodes only} |
H01L 27/0772 | . . . . . . . . | { Vertical bipolar transistor in combination with resistors only} |
H01L 27/0777 | . . . . . . . . | { Vertical bipolar transistor in combination with capacitors only} |
H01L 27/0783 | . . . . . . . | { Lateral bipolar transistors in combination with diodes, or capacitors, or resistors} |
![]() | H01L 27/0788 | . . . . . . | { comprising combinations of diodes or capacitors or resistors} |
![]() | H01L 27/08 | . . . | including only semiconductor components of a single kind |
H01L 27/0802 | . . . . | { Resistors only} |
![]() | H01L 27/0805 | . . . . | { Capacitors only} |
H01L 27/0814 | . . . . | { Diodes only} |
H01L 27/0817 | . . . . | { Thyristors only} |
![]() | H01L 27/082 | . . . . | including bipolar components only |
H01L 27/0821 | . . . . . | { Combination of lateral and vertical transistors only} |
![]() | H01L 27/0823 | . . . . . | { including vertical bipolar transistors only} |
H01L 27/0825 | . . . . . . | { Combination of vertical direct transistors of the same conductivity type having different characteristics, (e.g. Darlington transistors)} |
H01L 27/0826 | . . . . . . | { Combination of vertical complementary transistors} |
H01L 27/0828 | . . . . . . | { Combination of direct and inverse vertical transistors} |
![]() | H01L 27/085 | . . . . | { including field-effect components only} |
![]() | H01L 27/088 | . . . . . | the components being field-effect transistors with insulated gate |
H01L 27/0883 | . . . . . . | { Combination of depletion and enhancement field effect transistors} |
H01L 27/0886 | . . . . . . | { including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET} |
![]() | H01L 27/092 | . . . . . . | Complementary MIS field-effect transistors |
H01L 27/0921 | . . . . . . . | { Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention} |
H01L 27/0922 | . . . . . . . | { Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS} |
H01L 27/0924 | . . . . . . . | { including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET} |
H01L 27/0925 | . . . . . . . | { comprising an N-well only in the substrate} |
H01L 27/0927 | . . . . . . . | { comprising a P-well only in the substrate} |
H01L 27/0928 | . . . . . . . | { comprising both N- and P- wells in the substrate, e.g. twin-tub} |
H01L 27/095 | . . . . . | the components being Schottky barrier gate field-effect transistors |
H01L 27/098 | . . . . . | the components being PN junction gate field-effect transistors |
![]() | H01L 27/10 | . . . | including a plurality of individual components in a repetitive configuration |
H01L 27/101 | . . . . | { including resistors or capacitors only} |
![]() | H01L 27/102 | . . . . | including bipolar components |
H01L 27/1021 | . . . . . | { including diodes only} |
![]() | H01L 27/1022 | . . . . . | { including bipolar transistors} |
H01L 27/1023 | . . . . . . |
H01L 27/1024 | . . . . . . | { Arrays of single bipolar transistors only, e.g. read only memory structures} |
H01L 27/1025 | . . . . . . |
H01L 27/1026 | . . . . . . |
H01L 27/1027 | . . . . . | { Thyristors} |
H01L 27/1028 | . . . . . | { Double base diodes} |
![]() | H01L 27/105 | . . . . | including field-effect components WARNING - |
H01L 27/1052 | . . . . . | { Memory structures and multistep manufacturing processes therefor not provided for in groups H01L 27/1055 to H01L 27/112} |
H01L 27/1055 | . . . . . | { comprising charge coupled devices of the so-called bucket brigade type} |
H01L 27/1057 | . . . . . | { comprising charge coupled devices (CCD) or charge injection devices (CID)} |
![]() | H01L 27/108 | . . . . . | Dynamic random access memory structures (circuits G11C1/24, G11C 11/34) NOTE -
|
H01L 27/10802 | . . . . . . | { comprising floating-body transistors, e.g. floating-body cells (floating-body transistors per se H01L 29/7841)} |
![]() | H01L 27/10805 | . . . . . . | { with one-transistor one-capacitor memory cells} |
![]() | H01L 27/10808 | . . . . . . . | { the storage electrode stacked over transistor} |
H01L 27/10811 | . . . . . . . . | { with bit line higher than capacitor} |
H01L 27/10814 | . . . . . . . . | { with capacitor higher than bit line level} |
H01L 27/10817 | . . . . . . . . | { the storage electrode having multiple wings} |
H01L 27/1082 | . . . . . . . | { the capacitor extending under transfer transistor area} |
H01L 27/10823 | . . . . . . . | { the transistor having a trench structure in the substrate} |
H01L 27/10826 | . . . . . . . | { the transistor being of the FinFET type} |
![]() | H01L 27/10829 | . . . . . . . | { the capacitor being in a substrate trench} |
H01L 27/10832 | . . . . . . . . | { the capacitor extending under or around transfer transistor area} |
H01L 27/10835 | . . . . . . . . | { having storage electrode extension stacked over transistor} |
![]() | H01L 27/10838 | . . . . . . . | { the capacitor and the transistor being in one trench} |
![]() | H01L 27/10844 | . . . . . . | { Multistep manufacturing methods} |
![]() | H01L 27/10847 | . . . . . . . | { for structures comprising one transistor one-capacitor memory cells} |
![]() | H01L 27/1085 | . . . . . . . . | { with at least one step of making the capacitor or connections thereto (making a capacitor for integrated circuits H01L 28/40, H01L 29/66181)} |
![]() | H01L 27/10852 | . . . . . . . . . | { the capacitor extending over the access transistor} |
H01L 27/10855 | . . . . . . . . . . | { with at least one step of making a connection between transistor and capacitor, e.g. plug} |
H01L 27/10858 | . . . . . . . . . | { the capacitor extending under the access transistor area} |
![]() | H01L 27/10861 | . . . . . . . . . | { the capacitor being in a substrate trench} |
![]() | H01L 27/10873 | . . . . . . . . |
H01L 27/10876 | . . . . . . . . . | { the transistor having a trench structure in the substrate (vertical transistor in combination with a capacitor formed in a substrate trench H01L 27/10864)} |
H01L 27/10879 | . . . . . . . . . | { the transistor being of the FinFET type} |
![]() | H01L 27/10882 | . . . . . . . . | { with at least one step of making a data line} |
H01L 27/10894 | . . . . . . . | { with simultaneous manufacture of periphery and memory cells} |
H01L 27/10897 | . . . . . . | { Peripheral structures} |
![]() | H01L 27/11 | . . . . . | Static random access memory structures { and multistep manufacturing processes therefor (circuits G11C 11/40)} |
![]() | H01L 27/1104 | . . . . . . | { the load element being a MOSFET transistor} |
H01L 27/1112 | . . . . . . |
H01L 27/1116 | . . . . . . | { Peripheral circuit region} |
![]() | H01L 27/112 | . . . . . | Read-only memory structures { [ROM} and multistep manufacturing processes therefor] |
H01L 27/11206 | . . . . . . | { Programmable ROM [PROM], e.g. memory cells comprising a transistor and a fuse or an antifuse} |
![]() | H01L 27/11213 | . . . . . . | { ROM only} |
![]() | H01L 27/1122 | . . . . . . . | { with source and drain on the same level, e.g. lateral transistors} |
H01L 27/11226 | . . . . . . . . | { Source or drain contact programmed} |
![]() | H01L 27/11233 | . . . . . . . . | { Gate programmed, e.g. different gate material or no gate} |
H01L 27/1124 | . . . . . . . . . | { Gate contact programmed} |
H01L 27/11246 | . . . . . . . . . | { Gate dielectric programmed, e.g. different thickness} |
![]() | H01L 27/11253 | . . . . . . . . | { Doping programmed, e.g. mask ROM} |
H01L 27/11273 | . . . . . . . | { with source and drain on different levels, e.g. vertical channel} |
H01L 27/1128 | . . . . . . . | { with transistors on different levels, e.g. 3D ROM} |
![]() | H01L 27/11286 | . . . . . . | { Peripheral circuit regions} |
![]() | H01L 27/115 | . . . . . . | Electrically programmable read-only memories { and multistep manufacturing processes therefor} |
![]() | H01L 27/11502 | . . . . . . . | { with ferroelectric memory capacitor} |
H01L 27/11504 | . . . . . . . . | { Top-view layout} |
H01L 27/11507 | . . . . . . . . | { Memory core region} |
H01L 27/11509 | . . . . . . . . | { Peripheral circuit region} |
H01L 27/11512 | . . . . . . . . | { Boundary region between core and peripheral circuit region} |
H01L 27/11514 | . . . . . . . . | { Three-dimensional arrangements, e.g. cells on different height levels} |
![]() | H01L 27/11517 | . . . . . . . | { with floating gate} WARNING -
|
H01L 27/11519 | . . . . . . . . | { Top-view layout} |
![]() | H01L 27/11521 | . . . . . . . . |
![]() | H01L 27/11526 | . . . . . . . . | { Peripheral circuit region} |
H01L 27/11529 | . . . . . . . . . | { of memory regions comprising at least one cell select transistor, e.g. NAND} |
![]() | H01L 27/11531 | . . . . . . . . . | { Simultaneous fabrication of periphery and memory cells} |
![]() | H01L 27/11534 | . . . . . . . . . . | { including only one type of peripheral transistor} |
H01L 27/11536 | . . . . . . . . . . . | { Control gate layer used for the peripheral transistor} |
H01L 27/11539 | . . . . . . . . . . . | { Intergate dielectric layer used for the peripheral transistor} |
H01L 27/11541 | . . . . . . . . . . . | { Floating-gate layer used for the peripheral transistor} |
H01L 27/11543 | . . . . . . . . . . . | { Tunnel dielectric layer used for the peripheral transistor} |
H01L 27/11546 | . . . . . . . . . . | { including different types of peripheral transistors} |
H01L 27/11548 | . . . . . . . . | { Boundary region between core and peripheral circuit regions} |
![]() | H01L 27/11551 | . . . . . . . . | { Three-dimensional arrangements, e.g. cells on different height levels} |
![]() | H01L 27/11553 | . . . . . . . . . | { with source and drain on different levels, e.g. with sloping channel} |
H01L 27/11558 | . . . . . . . . | { the control gate being a doped region, e.g. single-poly memory cells} |
H01L 27/1156 | . . . . . . . . | N: the floating gate being an electrode shared by a plurality of components] |
![]() | H01L 27/11563 | . . . . . . . | { with charge trapping gate insulator, e.g. MNOS, NROM} |
H01L 27/11565 | . . . . . . . . | { Top-view layout} |
![]() | H01L 27/11568 | . . . . . . . . |
H01L 27/11573 | . . . . . . . . | { Peripheral circuit region} |
H01L 27/11575 | . . . . . . . . | { Boundary region between core and peripheral circuit region} |
![]() | H01L 27/11578 | . . . . . . . . | { Three-dimensional arrangements, e.g. cells on different height levels} |
![]() | H01L 27/11585 | . . . . . . . | { with gate electrode comprising a layer which is used for its ferroelectric memory properties, e.g. MFS (metal-ferroelectric-semiconductor), MFMIS (metal-ferroelectric-metal-insulator-semiconductor)} |
H01L 27/11587 | . . . . . . . . | { Top-view layout} |
H01L 27/1159 | . . . . . . . . | { Memory core region} |
H01L 27/11592 | . . . . . . . . | { Peripheral circuit region} |
H01L 27/11595 | . . . . . . . . | { Boundary region between core and peripheral circuit region} |
H01L 27/11597 | . . . . . . . . | { Three-dimensional arrangements, e.g. cells on different height levels} |
![]() | H01L 27/118 | . . . . | Masterslice integrated circuits |
![]() | H01L 27/12 | . . | the substrate being other than a semiconductor body, e.g. an insulating body |
![]() | H01L 27/1203 | . . . | { the substrate comprising an insulating body on a semiconductor body, e.g. SOI (three-dimensional layout H01L 27/0688)} |
H01L 27/1207 | . . . . | { combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits} |
H01L 27/1211 | . . . . | { combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET} |
![]() | H01L 27/1214 | . . . | { comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs} WARNING -
|
H01L 27/1218 | . . . . | { with a particular composition or structure of the substrate} |
![]() | H01L 27/1222 | . . . . | { with a particular composition, shape or crystalline structure of the active layer} |
H01L 27/1225 | . . . . . | { with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO} |
H01L 27/1229 | . . . . . | { with different crystal properties within a device or between different devices} |
H01L 27/1233 | . . . . . | { with different thicknesses of the active layer in different devices} |
H01L 27/1237 | . . . . | { with a different composition, shape, layout or thickness of the gate insulator in different devices} |
![]() | H01L 27/124 | . . . . | { with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits (wiring structures per se H01L 23/52)} |
H01L 27/1248 | . . . . | { with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement} |
H01L 27/1251 | . . . . | { comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs} |
H01L 27/1255 | . . . . | { integrated with passive devices, e.g. auxiliary capacitors} |
![]() | H01L 27/1259 | . . . . | { Multistep manufacturing methods} |
![]() | H01L 27/1262 | . . . . . | { with a particular formation, treatment or coating of the substrate} |
H01L 27/1266 | . . . . . . | { the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate} |
![]() | H01L 27/127 | . . . . . | { with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement} |
![]() | H01L 27/1274 | . . . . . . | { using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor (crystallisation per se H01L 21/02667)} |
H01L 27/1277 | . . . . . . . | { using a crystallisation promoting species, e.g. local introduction of Ni catalyst} |
H01L 27/1281 | . . . . . . . | { by using structural features to control crystal growth, e.g. placement of grain filters} |
H01L 27/1285 | . . . . . . . | { using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors} |
H01L 27/1288 | . . . . . | { employing particular masking sequences or specially adapted masks, e.g. half-tone mask} |
H01L 27/1292 | . . . . . | { using liquid deposition, e.g. printing} |
H01L 27/1296 | . . . . . | { adapted to increase the uniformity of device parameters} |
H01L 27/13 | . . . | combined with thin-film or thick-film passive components { (passive two-terminal components without a potential-jump or surface barrier for integrated circuits, details thereof and multistep manufacturing processes therefor H01L 28/00)} |
![]() | H01L 27/14 | . | including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength, or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation (radiation-sensitive components structurally associated with one or more electric light sources only H01L 31/14; couplings of light guides with optoelectronic elements G02B 6/42) |
![]() | H01L 27/142 | . . | Energy conversion devices |
H01L 27/1421 | . . . | { comprising bypass diodes integrated or directly associated with the device, e.g. bypass diode integrated or formed in or on the same substrate as the solar cell} |
![]() | H01L 27/1422 | . . . | { in a repetitive configuration, e.g. planar multijunction solar cells} |
![]() | H01L 27/1423 | . . . . | { comprising only thin film solar cells deposited on a substrate, e.g. thin film (a-Si, CIS, CdTe) solar modules} |
H01L 27/1425 | . . . . . | { characterized by special patterning methods to connect the cells in a module, e.g. laser cutting of the conductive and/or active layers} |
H01L 27/1426 | . . . . . | { comprising particular structures for the electrical interconnection of adjacent solar cells in the module} |
H01L 27/1427 | . . . . . | { comprising specific means for obtaining a partial light transmission of the module, e.g. partially transparent thin film solar modules for windows} |
H01L 27/1428 | . . . . | { comprising multiple vertical junction or V-groove junction solar cells formed in a semiconductor substrate} |
![]() | H01L 27/144 | . . | Devices controlled by radiation |
H01L 27/1443 | . . . | { with at least one potential jump or surface barrier} |
H01L 27/1446 | . . . | { in a repetitive configuration} |
![]() | H01L 27/146 | . . . | Imager structures |
![]() | H01L 27/14601 | . . . . | { Structural or functional details thereof} |
![]() | H01L 27/14603 | . . . . . | { Special geometry or disposition of pixel-elements, address-lines or gate-electrodes} |
H01L 27/14605 | . . . . . . | { Structural or functional details relating to the position of the pixel elements, e.g. smaller pixel elements in the center of the imager compared to pixel elements at the periphery} |
H01L 27/14607 | . . . . . . | { Geometry of the photosensitive area} |
![]() | H01L 27/14609 | . . . . . | { Pixel-elements with integrated switching, control, storage or amplification elements (scanning details of imagers H04N 3/15; circuitry of imagers H04N 5/369)} |
H01L 27/1461 | . . . . . . | { characterised by the photosensitive area} |
![]() | H01L 27/14612 | . . . . . . | { involving a transistor} |
H01L 27/14618 | . . . . . | { Containers} |
![]() | H01L 27/1462 | . . . . . | { Coatings} |
![]() | H01L 27/14625 | . . . . . | { Optical elements or arrangements associated with the device} |
H01L 27/1463 | . . . . . | { Pixel isolation structures} |
H01L 27/14632 | . . . . . | { Wafer-level processed structures} |
H01L 27/14634 | . . . . . | { Assemblies, i.e. Hybrid structures} |
H01L 27/14636 | . . . . . | { Interconnect structures} |
H01L 27/14638 | . . . . . | { Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane} |
H01L 27/1464 | . . . . . | { Back illuminated imager structures} |
H01L 27/14641 | . . . . . | { Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements} |
![]() | H01L 27/14643 | . . . . | { Photodiode arrays; MOS imagers} |
![]() | H01L 27/14645 | . . . . . | { Colour imagers} |
H01L 27/14647 | . . . . . . | { Multicolour imagers having a stacked pixel-element structure, e.g. npn, npnpn or MQW elements} |
![]() | H01L 27/14649 | . . . . . | { Infra-red imagers} |
H01L 27/1465 | . . . . . . | { of the hybrid type} |
H01L 27/14652 | . . . . . . | { Multispectral infra-red imagers, having a stacked pixel-element structure, e.g. npn, npnpn or MQW structures} |
![]() | H01L 27/14654 | . . . . . | { Blooming suppression} |
![]() | H01L 27/14658 | . . . . . | { X-ray, gamma-ray or corpuscular radiation imagers (measuring X-, gamma- or corpuscular radiation G01T 1/00)} |
![]() | H01L 27/14665 | . . . . | { Imagers using a photoconductor layer} |