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Class   716DATA PROCESSING: DESIGN AND ANALYSIS OF CIRCUIT OR SEMICONDUCTOR MASK
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[List of Pre Grant Publications for class 716 subclass 1][List of Patents for class 716 subclass 1]1 CIRCUIT DESIGN
 [List of Pre Grant Publications for class 716 subclass 2][List of Patents for class 716 subclass 2]2 Subclass 2 indent level is 1 Optimization (e.g., redundancy, compaction)
 [List of Pre Grant Publications for class 716 subclass 3][List of Patents for class 716 subclass 3]3 Subclass 3 indent level is 1 Translation (e.g., conversion, equivalence)
[List of Pre Grant Publications for class 716 subclass 4][List of Patents for class 716 subclass 4]4 Subclass 4 indent level is 1 Testing or evaluating
[List of Pre Grant Publications for class 716 subclass 5][List of Patents for class 716 subclass 5]5 Subclass 5 indent level is 2 Design verification (e.g., wiring line capacitance, fan-out checking, minimum path width)
 [List of Pre Grant Publications for class 716 subclass 7][List of Patents for class 716 subclass 7]7 Subclass 7 indent level is 1 Partitioning (e.g., function block, ordering constraint)
[List of Pre Grant Publications for class 716 subclass 8][List of Patents for class 716 subclass 8]8 Subclass 8 indent level is 1 Floorplanning
 [List of Pre Grant Publications for class 716 subclass 9][List of Patents for class 716 subclass 9]9 Subclass 9 indent level is 2 Detailed placement (i.e., iterative improvement)
 [List of Pre Grant Publications for class 716 subclass 10][List of Patents for class 716 subclass 10]10 Subclass 10 indent level is 2 Constraint-based placement (e.g., critical block assignment, delay limits, wiring capacitance)
 [List of Pre Grant Publications for class 716 subclass 11][List of Patents for class 716 subclass 11]11 Subclass 11 indent level is 2 Layout editor (e.g., updating)
[List of Pre Grant Publications for class 716 subclass 12][List of Patents for class 716 subclass 12]12 Subclass 12 indent level is 1 Routing (e.g., routing map, netlisting)
 [List of Pre Grant Publications for class 716 subclass 13][List of Patents for class 716 subclass 13]13 Subclass 13 indent level is 2 Global routing (e.g., shortest path, dead space, or duplicate trace elimination)
 [List of Pre Grant Publications for class 716 subclass 14][List of Patents for class 716 subclass 14]14 Subclass 14 indent level is 2 Detailed routing (e.g., channel routing, switch box routing)
 [List of Pre Grant Publications for class 716 subclass 15][List of Patents for class 716 subclass 15]15 Subclass 15 indent level is 2 PCB wiring
 [List of Pre Grant Publications for class 716 subclass 16][List of Patents for class 716 subclass 16]16 Subclass 16 indent level is 2 PLA, PLD, FPGA, OR MCM
 [List of Pre Grant Publications for class 716 subclass 17][List of Patents for class 716 subclass 17]17 Subclass 17 indent level is 1 Programmable integrated circuit (e.g., basic cell, standard cell, macrocell)
 [List of Pre Grant Publications for class 716 subclass 18][List of Patents for class 716 subclass 18]18 Subclass 18 indent level is 1 Logical circuit synthesizer
[List of Pre Grant Publications for class 716 subclass 19][List of Patents for class 716 subclass 19]19 DESIGN OF SEMICONDUCTOR MASK
 [List of Pre Grant Publications for class 716 subclass 20][List of Patents for class 716 subclass 20]20 Subclass 20 indent level is 1 Mesh generation
 [List of Pre Grant Publications for class 716 subclass 21][List of Patents for class 716 subclass 21]21 Subclass 21 indent level is 1 Pattern exposure
 
FOREIGN ART COLLECTIONS
 
      FOR000          CLASS-RELATED FOREIGN DOCUMENTS
Any foreign patents or non-patent literature from subclasses that have been reclassified have been transferred directly to FOR Collections listed below. These Collections contain ONLY foreign patents or non-patent literature. The parenthetical references in the Collection titles refer to the abolished subclasses from which these Collections were derived.
     APPLICATIONS (364/400)
  FOR489          Subclass FOR489 indent level is 1 Circuit design and analysis (364/489)
  FOR490          Subclass FOR490 indent level is 2 Integrated (364/490)
      FOR491          Subclass FOR491 indent level is 3 Layout (364/491)

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