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| Class 714 | ERROR DETECTION/CORRECTION AND FAULT DETECTION/RECOVERY |
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![[List of Pre Grant Publications for class 714 subclass 100]](../as.gif) | ![[List of Patents for class 714 subclass 100]](../ps.gif) | 100 | DATA PROCESSING SYSTEM ERROR OR FAULT HANDLING |
| | 1 |  Reliability and availability |
| | 2 |  Fault recovery |
| | 3 |  By masking or reconfiguration |
| | 4 |  Of network |
| | 5 | Of memory or peripheral subsystem |
| | 6 |  Redundant stored data accessed (e.g., duplicated data, error correction coded data, or other parity-type data) |
| | 8 | Isolating failed storage location (e.g., sector remapping) |
| | 9 | Access processor affected (e.g., I/O processor, MMU, DMA processor) |
| | 10 | Of processor |
| | 11 | Concurrent, redundantly operating processors |
| | 13 | Prepared backup processor (e.g., initializing cold backup) or updating backup processor (e.g., by checkpoint message) |
| | 14 | Of power supply |
| | 15 | State recovery (i.e., process or data file) |
| | 16 | Forward recovery (e.g., redoing committed action) |
| | 18 | Transmission data record (e.g., for retransmission) |
| | 19 | Undo record |
| | 20 | Plural recovery data sets containing set interrelation data (e.g., time values or log record numbers) |
| | 21 | State validity check |
| | 22 | With power supply status monitoring |
| | 23 | Resetting processor |
| | 24 | Safe shutdown |
| | 25 | Fault locating (i.e., diagnosis or testing) |
| | 26 | Artificial intelligence (e.g., diagnostic expert system) |
| | 27 | Particular access structure |
| | 28 | Substituted emulative component (e.g., emulator microprocessor) |
| | 30 | Built-in hardware for diagnosing or testing within-system component (e.g., microprocessor test mode circuit, scan path) |
| | 31 | Additional processor for in-system fault locating (e.g., distributed diagnosis program) |
| | 32 | Particular stimulus creation |
| | 33 | Derived from analysis (e.g., of a specification or by stimulation) |
| | 34 | Halt, clock, or interrupt signal (e.g., freezing, hardware breakpoint, single-stepping) |
| | 35 | Substituted or added instruction (e.g., code instrumenting, breakpoint instruction) |
| | 36 | Test sequence at power-up or initialization |
| | 37 | Analysis (e.g., of output, state, or design) |
| | 38 | Of computer software |
| | 39 | Monitor recognizes sequence of events (e.g., protocol or logic state analyzer) |
| | 40 | Component dependent technique |
| | 41 | For reliability enhancing component (e.g., testing backup spare, or fault injection) |
| | 42 | Memory or storage device component fault |
| | 43 | Bus, I/O channel, or network path component fault |
| | 44 | Peripheral device component fault |
| | 45 | Output recording (e.g., signature or trace) |
| | 46 | Operator interface for diagnosing or testing |
| | 47 | Performance monitoring for fault avoidance |
| | 48 | Error detection or notification |
| | 49 | State error (i.e., content of instruction, data, or message) |
| | 50 | State out of sequence |
| | 51 | Control flow state sequence monitored (e.g., watchdog processor for control-flow checking) |
| | 52 | Error checking code |
| | 53 | Address error |
| | 54 | Storage content error |
| | 55 | Timing error (e.g., watchdog timer time-out) |
| | 57 | Error forwarding and presentation (e.g., operator console, error display) |
| | 699 | PULSE OR DATA ERROR HANDLING |
| | 700 | Skew detection correction |
| | 701 | Data formatting to improve error detection correction capability |
| | 703 | Testing of error-check system |
| | 704 | Error count or rate |
| | 705 | Pseudo-error rate |
| | 706 | Up-down counter |
| | 707 | Synchronization control |
| | 708 | Shutdown or establishing system parameter (e.g., transmission rate) |
| | 709 | Data pulse evaluation/bit decision |
| | 710 | Replacement of memory spare location, portion, or segment |
| | 712 | Transmission facility testing |
| | 713 | For channel having repeater |
| | 714 | By tone signal |
| | 715 | Test pattern with comparison |
| | 717 | Loop or ring configuration |
| | 718 | Memory testing |
| | 719 | Read-in with read-out and compare |
| | 721 | Electrical parameter (e.g., threshold voltage) |
| | 722 | Performing arithmetic function on memory contents |
| | 723 | Error mapping or logging |
| | 724 | Digital logic testing |
| | 725 | Programmable logic array (PLA) testing |
| | 726 | Scan path testing (e.g., level sensitive scan design (LSSD)) |
| | 727 | Boundary scan |
| | 728 | Random pattern generation (includes pseudorandom pattern) |
| | 729 | Plural scan paths |
| | 730 | Addressing |
| | 731 | Clock or synchronization |
| | 732 | Signature analysis |
| | 733 | Built-in testing circuit (BILBO) |
| | 734 | Structural (in-circuit test) |
| | 735 | Device response compared to input pattern |
| | 736 | Device response compared to expected fault-free response |
| | 737 | Device response compared to fault dictionary/truth table |
| | 738 | Including test pattern generator |
| | 739 | Random pattern generation (includes pseudorandom pattern) |
| | 740 | Having analog signal |
| | 741 | Simulation |
| | 742 | Testing specific device |
| | 743 | Addressing |
| | 744 | Clock or synchronization |
| | 745 | Determination of marginal operation limits |
| | 746 | Digital data error correction |
| | 747 | Substitution of previous valid data |
| | 748 | Request for retransmission |
| | 749 | Retransmission if no ACK returned |
| | 750 | Feedback to transmitter for comparison |
| | 751 | Including forward error correction capability |
| | 752 | Forward correction by block code |
| | 753 | Double error correcting with single error correcting code |
| | 754 | Error correction during refresh cycle |
| | 755 | Double encoding codes (e.g., product, concatenated) |
| | 757 | Parallel generation of check bits |
| | 758 | Error correcting code with additional error detection code (e.g., cyclic redundancy character, parity) |
| | 759 | |
