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Class   712ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: PROCESSING ARCHITECTURES AND INSTRUCTION PROCESSING (E.G., PROCESSORS)
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[List of Pre Grant Publications for class 712 subclass 1][List of Patents for class 712 subclass 1]1 PROCESSING ARCHITECTURE
[List of Pre Grant Publications for class 712 subclass 2][List of Patents for class 712 subclass 2]2 Subclass 2 indent level is 1 Vector processor
 [List of Pre Grant Publications for class 712 subclass 3][List of Patents for class 712 subclass 3]3 Subclass 3 indent level is 2 Scalar/vector processor interface
[List of Pre Grant Publications for class 712 subclass 4][List of Patents for class 712 subclass 4]4 Subclass 4 indent level is 2 Distributing of vector data to vector registers
 [List of Pre Grant Publications for class 712 subclass 6][List of Patents for class 712 subclass 6]6 Subclass 6 indent level is 2 Controlling access to external vector data
[List of Pre Grant Publications for class 712 subclass 7][List of Patents for class 712 subclass 7]7 Subclass 7 indent level is 2 Vector processor operation
[List of Pre Grant Publications for class 712 subclass 10][List of Patents for class 712 subclass 10]10 Subclass 10 indent level is 1 Array processor
[List of Pre Grant Publications for class 712 subclass 11][List of Patents for class 712 subclass 11]11 Subclass 11 indent level is 2 Array processor element interconnection
[List of Pre Grant Publications for class 712 subclass 16][List of Patents for class 712 subclass 16]16 Subclass 16 indent level is 2 Array processor operation
 [List of Pre Grant Publications for class 712 subclass 23][List of Patents for class 712 subclass 23]23 Subclass 23 indent level is 1 Superscalar
 [List of Pre Grant Publications for class 712 subclass 24][List of Patents for class 712 subclass 24]24 Subclass 24 indent level is 1 Long instruction word
[List of Pre Grant Publications for class 712 subclass 25][List of Patents for class 712 subclass 25]25 Subclass 25 indent level is 1 Data driven or demand driven processor
 [List of Pre Grant Publications for class 712 subclass 26][List of Patents for class 712 subclass 26]26 Subclass 26 indent level is 2 Detection/pairing based on destination, ID tag, or data
 [List of Pre Grant Publications for class 712 subclass 27][List of Patents for class 712 subclass 27]27 Subclass 27 indent level is 2 Particular data driven memory structure
[List of Pre Grant Publications for class 712 subclass 28][List of Patents for class 712 subclass 28]28 Subclass 28 indent level is 1 Distributed processing system
 [List of Pre Grant Publications for class 712 subclass 29][List of Patents for class 712 subclass 29]29 Subclass 29 indent level is 2 Interface
[List of Pre Grant Publications for class 712 subclass 30][List of Patents for class 712 subclass 30]30 Subclass 30 indent level is 2 Operation
[List of Pre Grant Publications for class 712 subclass 32][List of Patents for class 712 subclass 32]32 Subclass 32 indent level is 1 Microprocessor or multichip or multimodule processor having sequential program control
 [List of Pre Grant Publications for class 712 subclass 33][List of Patents for class 712 subclass 33]33 Subclass 33 indent level is 2 Having multiple internal buses
[List of Pre Grant Publications for class 712 subclass 34][List of Patents for class 712 subclass 34]34 Subclass 34 indent level is 2 Including coprocessor
 [List of Pre Grant Publications for class 712 subclass 36][List of Patents for class 712 subclass 36]36 Subclass 36 indent level is 2 Application specific
 [List of Pre Grant Publications for class 712 subclass 37][List of Patents for class 712 subclass 37]37 Subclass 37 indent level is 2 Programmable (e.g., EPROM)
[List of Pre Grant Publications for class 712 subclass 38][List of Patents for class 712 subclass 38]38 Subclass 38 indent level is 2 Offchip interface
 [List of Pre Grant Publications for class 712 subclass 41][List of Patents for class 712 subclass 41]41 Subclass 41 indent level is 2 RISC
[List of Pre Grant Publications for class 712 subclass 42][List of Patents for class 712 subclass 42]42 Subclass 42 indent level is 2 Operation
[List of Pre Grant Publications for class 712 subclass 200][List of Patents for class 712 subclass 200]200 ARCHITECTURE BASED INSTRUCTION PROCESSING
 [List of Pre Grant Publications for class 712 subclass 201][List of Patents for class 712 subclass 201]201 Subclass 201 indent level is 1 Data flow based system
 [List of Pre Grant Publications for class 712 subclass 202][List of Patents for class 712 subclass 202]202 Subclass 202 indent level is 1 Stack based computer
 [List of Pre Grant Publications for class 712 subclass 203][List of Patents for class 712 subclass 203]203 Subclass 203 indent level is 1 Multiprocessor instruction
 [List of Pre Grant Publications for class 712 subclass 204][List of Patents for class 712 subclass 204]204 INSTRUCTION ALIGNMENT
[List of Pre Grant Publications for class 712 subclass 205][List of Patents for class 712 subclass 205]205 INSTRUCTION FETCHING
 [List of Pre Grant Publications for class 712 subclass 206][List of Patents for class 712 subclass 206]206 Subclass 206 indent level is 1 Of multiple instructions simultaneously
 [List of Pre Grant Publications for class 712 subclass 207][List of Patents for class 712 subclass 207]207 Subclass 207 indent level is 1 Prefetching
[List of Pre Grant Publications for class 712 subclass 208][List of Patents for class 712 subclass 208]208 INSTRUCTION DECODING (E.G., BY MICROINSTRUCTION, START ADDRESS GENERATOR, HARDWIRED)
 [List of Pre Grant Publications for class 712 subclass 209][List of Patents for class 712 subclass 209]209 Subclass 209 indent level is 1 Decoding instruction to accommodate plural instruction interpretations (e.g., different dialects, languages, emulation, etc.)
 [List of Pre Grant Publications for class 712 subclass 210][List of Patents for class 712 subclass 210]210 Subclass 210 indent level is 1 Decoding instruction to accommodate variable length instruction or operand
 [List of Pre Grant Publications for class 712 subclass 211][List of Patents for class 712 subclass 211]211 Subclass 211 indent level is 1 Decoding instruction to generate an address of a microroutine
 [List of Pre Grant Publications for class 712 subclass 212][List of Patents for class 712 subclass 212]212 Subclass 212 indent level is 1 Decoding by plural parallel decoders
 [List of Pre Grant Publications for class 712 subclass 213][List of Patents for class 712 subclass 213]213 Subclass 213 indent level is 1 Predecoding of instruction component
[List of Pre Grant Publications for class 712 subclass 214][List of Patents for class 712 subclass 214]214 INSTRUCTION ISSUING
 [List of Pre Grant Publications for class 712 subclass 215][List of Patents for class 712 subclass 215]215 Subclass 215 indent level is 1 Simultaneous issuance of multiple instructions
[List of Pre Grant Publications for class 712 subclass 216][List of Patents for class 712 subclass 216]216 DYNAMIC INSTRUCTION DEPENDENCY CHECKING, MONITORING OR CONFLICT RESOLUTION
 [List of Pre Grant Publications for class 712 subclass 217][List of Patents for class 712 subclass 217]217 Subclass 217 indent level is 1 Scoreboarding, reservation station, or aliasing
 [List of Pre Grant Publications for class 712 subclass 218][List of Patents for class 712 subclass 218]218 Subclass 218 indent level is 1 Commitment control or register bypass
 [List of Pre Grant Publications for class 712 subclass 219][List of Patents for class 712 subclass 219]219 Subclass 219 indent level is 1 Reducing an impact of a stall or pipeline bubble
[List of Pre Grant Publications for class 712 subclass 220][List of Patents for class 712 subclass 220]220 PROCESSING CONTROL
[List of Pre Grant Publications for class 712 subclass 221][List of Patents for class 712 subclass 221]221 Subclass 221 indent level is 1 Arithmetic operation instruction processing
 [List of Pre Grant Publications for class 712 subclass 222][List of Patents for class 712 subclass 222]222 Subclass 222 indent level is 2 Floating point or vector
[List of Pre Grant Publications for class 712 subclass 223][List of Patents for class 712 subclass 223]223 Subclass 223 indent level is 1 Logic operation instruction processing
 [List of Pre Grant Publications for class 712 subclass 224][List of Patents for class 712 subclass 224]224 Subclass 224 indent level is 2 Masking
 [List of Pre Grant Publications for class 712 subclass 225][List of Patents for class 712 subclass 225]225 Subclass 225 indent level is 1 Processing control for data transfer
 [List of Pre Grant Publications for class 712 subclass 226][List of Patents for class 712 subclass 226]226 Subclass 226 indent level is 1 Instruction modification based on condition
 [List of Pre Grant Publications for class 712 subclass 227][List of Patents for class 712 subclass 227]227 Subclass 227 indent level is 1 Specialized instruction processing in support of testing, debugging, emulation
 [List of Pre Grant Publications for class 712 subclass 228][List of Patents for class 712 subclass 228]228 Subclass 228 indent level is 1 Context preserving (e.g., context swapping, checkpointing, register windowing
 [List of Pre Grant Publications for class 712 subclass 229][List of Patents for class 712 subclass 229]229 Subclass 229 indent level is 1 Mode switch or change
 [List of Pre Grant Publications for class 712 subclass 230][List of Patents for class 712 subclass 230]230 Subclass 230 indent level is 1 Generating next microinstruction address
 [List of Pre Grant Publications for class 712 subclass 231][List of Patents for class 712 subclass 231]231 Subclass 231 indent level is 1 Detecting end or completion of microprogram
 [List of Pre Grant Publications for class 712 subclass 232][List of Patents for class 712 subclass 232]232 Subclass 232 indent level is 1 Hardwired controller
[List of Pre Grant Publications for class 712 subclass 233][List of Patents for class 712 subclass 233]233 Subclass 233 indent level is 1 Branching (e.g., delayed branch, loop control, branch predict, interrupt)
[List of Pre Grant Publications for class 712 subclass 234][List of Patents for class 712 subclass 234]234 Subclass 234 indent level is 2 Conditional branching
 [List of Pre Grant Publications for class 712 subclass 241][List of Patents for class 712 subclass 241]241 Subclass 241 indent level is 2 Loop execution
 [List of Pre Grant Publications for class 712 subclass 242][List of Patents for class 712 subclass 242]242 Subclass 242 indent level is 2 To macro-instruction routine
 [List of Pre Grant Publications for class 712 subclass 243][List of Patents for class 712 subclass 243]243 Subclass 243 indent level is 2 To microinstruction subroutine
 [List of Pre Grant Publications for class 712 subclass 244][List of Patents for class 712 subclass 244]244 Subclass 244 indent level is 2 Exeception processing (e.g., interrupts and traps)
[List of Pre Grant Publications for class 712 subclass 245][List of Patents for class 712 subclass 245]245 Subclass 245 indent level is 1 Processing sequence control (i.e., microsequencing)
 [List of Pre Grant Publications for class 712 subclass 246][List of Patents for class 712 subclass 246]246 Subclass 246 indent level is 2 Plural microsequencers (e.g., dual microsequencers)
 [List of Pre Grant Publications for class 712 subclass 247][List of Patents for class 712 subclass 247]247 Subclass 247 indent level is 2 Multilevel microcontroller (e.g., dual-level control store)
 [List of Pre Grant Publications for class 712 subclass 248][List of Patents for class 712 subclass 248]248 Subclass 248 indent level is 2 Writable/changeable control store architecture
 [List of Pre Grant Publications for class 712 subclass 300][List of Patents for class 712 subclass 300]300 BYTE-WORD REARRANGING, BIT-FIELD INSERTION OR EXTRACTION, STRING LENGTH DETECTING, OR SEQUENCE DETECTING
 
E-SUBCLASSES
 
The following subclasses beginning with the letter E are E-subclasses. Each E-subclass corresponds in scope to a classification in a foreign classification system, for example, the European Classification system (ECLA). The foreign classification equivalent to an E-subclass is identified in the subclass definition. In addition to US documents classified in E-subclasses by US examiners, documents are regularly classified in E-subclasses according to the classification practices of any foreign Offices identified in parentheses at the end of the title. For example, "(EPO)" at the end of a title indicates both European and US patent documents, as classified by the EPO, are regularly added to the subclass. E-subclasses may contain subject matter outside the scope of this class.Consult their definitions, or the documents themselves to clarify or interpret titles.
[List of Pre Grant Publications for class 712 subclass E9.001][List of Patents for class 712 subclass E9.001]E9.001 ARRANGEMENTS FOR PROGRAM CONTROL, E.G., CONTROL UNIT (EPO)
 [List of Pre Grant Publications for class 712 subclass E9.002][List of Patents for class 712 subclass E9.002]E9.002 Subclass E9.002 indent level is 1 Using wired connections, e.g., plugboard (EPO)
[List of Pre Grant Publications for class 712 subclass E9.003][List of Patents for class 712 subclass E9.003]E9.003 Subclass E9.003 indent level is 1 Using stored program, i.e., using internal store of processing (EPO)
[List of Pre Grant Publications for class 712 subclass E9.004][List of Patents for class 712 subclass E9.004]E9.004 Subclass E9.004 indent level is 2 Micro-control or micro-program arrangements (EPO)
[List of Pre Grant Publications for class 712 subclass E9.016][List of Patents for class 712 subclass E9.016]E9.016 Subclass E9.016 indent level is 2 Arrangements for executing machine-instructions, e.g., instruction decode (EPO)