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CLASS 711,	ELECTRICAL COMPUTERS AND DIGITAL PROCESSING SYSTEMS: MEMORY
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SECTION I - CLASS DEFINITION

This class provides, within an electrical computer or digital data processing system, for the following subject matter:

A. Processes and apparatus for addressing memory wherein the processes and apparatus involve significant address manipulating (e.g., combining, translating, or mapping and other techniques for formatting and modifying address data) and are combined with specific memory configurations or memory systems;

B. Processes and apparatus for accessing and controlling memory (e.g., transferring and modifying address data, selecting storage devices, scheduling access); and

C. Processes and apparatus for forming memory addresses (e.g., virtual memory addressing, address translating, translation-lookaside buffers (TLBs), boundary checking, and page mode).

SCOPE OF THE CLASS

SECTION II - REFERENCES TO OTHER CLASSES

SEE OR SEARCH CLASS:

SECTION III - GLOSSARY

The terms below have been defined for purposes of classification in this class and are shown in underlined type when used in the class and subclass definitions. When these terms are not underlined in the definitions, the meaning is not restricted to the glossary definitions below.

ADDRESS DATA

Data that specify a location in a memory.

BUS

A conductor used for transferring data, signals, or power.

COMPUTER

A machine that inputs data, processes data, stores data, and outputs data.

DATA

Representation of information in a coded manner suitable for communication, interpretation, or processing. See ADDRESS DATA, INSTRUCTION DATA, STATUS DATA, and USER DATA in this glossary,

DATA PROCESSING

See PROCESSING below.

DIGITAL DATA PROCESSING SYSTEM

An arrangement of processor(s) in combination with either memory or peripherals, or both, performing data processing.

INFORMATION

Meaning that a human being assigns to data by means of the conventions applied to that data.

INSTRUCTION DATA

Data that represent an operation and identify its operands, if any.

MEMORY

A functional unit to which data can be stored and from which data can be retrieved.

PERIPHERAL

A functional unit that transmits data to or receives data from a computer to which it is coupled (e.g., modems, keyboards, monitors, touch tablet, printers, joy stick, disk and tape drives, etc.).

PROCESSING

Methods or apparatus performing systematic operations upon data or information exemplified by functions such as data or information transferring, merging, sorting, and calculating (i.e., arithmetic operations or logical operations).

Note: In an effort to avoid redundant constructions, in this class, where appropriate, the term address data processing is used in place of address data data processing.

PROCESSOR

A functional unit that interprets and executes instruction data.

STATUS DATA

Data that represent conditions of data, computers, peripherals, memory, etc.

USER DATA

Data other than address data, instruction data, or status data.

SUBCLASSES

1	ADDRESSING COMBINED WITH SPECIFIC MEMORY CONFIGURATION OR SYSTEM:
	This subclass is indented under the class definition.  Subject matter comprising means or steps for determining one or more values (i.e., address data) that specify one or more locations in a storage medium wherein the means or steps are claimed in combination with a particular configuration or system for storing data. (1) Note. Classification herein requires significant address manipulating (i.e., more than nominal recitation of an addressing technique). Significant address manipulating is exemplified by address data processing functions such as combining, translating, mapping, and other techniques associated with forming or modifying address data. (2) Note. Means or steps for determining a value that specifies a memory location (i.e., address data) must include more than nominal recitation of processing functions and memory components for classification herein. (3) Note. This subclass and those indented below provide for combinations of data processing, particular memory systems, and significant address data manipulating. Generalized addressing in a digital data processing system is classified elsewhere in this class. See the SEARCH THIS CLASS, SUBCLASS notes below. (4) Note. This subclass and those indented below may include means (e.g., processor, controller, etc.) or steps for control of a memory of a digital data processing system in combination with memory accessing (e.g., reading, writing). Memory accessing and control for specific memory compositions, hierarchical memory configurations, and shared memory, however, is classified elsewhere. See the SEARCH THIS CLASS, SUBCLASS notes below. (5) Note. Means or steps for accessing and controlling plural memory configurations (e.g., data farms, "library" systems) that include significant data processing are classified herein. Control systems for delivering storage media (e.g., delivery of robotics or automated tapes or cartridges, selection and delivery of platters), however, are properly classified elsewhere under automated control or another appropriate subclass in the respective device, robotics, and generic control classes. In instances involving significant data processing and significant details of media delivery systems, classification herein is proper. SEE OR SEARCH THIS CLASS, SUBCLASS: 3, for cache memory addressing. 101, through 116, for storage accessing and control for various memory compositions (e.g., ROM, RAM, CAM, dynamic, detachable, bubble, etc.) with more than nominal data processing. 117, through 146, for storage accessing and control for hierarchical memory with nominal address forming. 147, through 154, for storage accessing and control for shared memory with nominal address forming. 200+, for generalized address forming in data processing systems. SEE OR SEARCH CLASS: 326,  Electronic Digital Logic Circuitry,   subclasses 105+ for digital logic decoding circuits in general. 340,  Communications: Electrical,   subclasses 825.79+ for selective matrix which may be used for control or as a switching means. 345,  Computer Graphics Processing and Selective Visual Display Systems,   subclasses 530 through 574for processing indices to locations (or addresses) of stored data elements in a computer graphic processing system. 365,  Static Information Storage and Retrieval,   subclasses 189.011 for read/write circuits, and subclasses 230.01+ for addressing of addressable, static single storage elements or plural elements of the same type. 369,  Dynamic Information Storage or Retrieval,   subclasses 30.01 through 41.01,69, and 176-271, as appropriate, for subject matter related to designation or selection of storage medium to be used for storage and retrieval. 370,  Multiplex Communications,   appropriate subclasses for multiplex switching techniques similar to addressing or the handling of memory information signals. 704,  Data Processing: Speech Signal Processing, Linguistics, Language Translation and Audio Compression/Decompression,   subclasses 2+ for memory control scheme combined with linguistics. 707,  Data Processing: Database and File Management or Data Structures, or Document Processing,   subclasses 1+ for database management and file management systems including significant addressing, retrieval, or manipulation of information contained within a database of a digital data processing system or computer including searching, query processing, information locating and retrieval techniques from a file or database; subclasses 100+ for database schema types; and subclasses 200+ for file maintenance operations, allocating or deallocating memory space to files, garbage collection, and hierarchical or tree filling systems. 710,  Electrical Computers and Digital Data Processing Systems: Input/Output,   subclasses 3 through 4for Input/Out addressing, subclass 9 for address assignment for configuring peripherals, subclasses 22-28 for direct memory accessing (DMA) and subclass 316 for system intra-connecting switching. 901,  Robots,   appropriate cross-reference art collections for reprogrammable, multifunction manipulators designed to move devices.

2	Addressing extended or expanded memory:
	This subclass is indented under subclass 1.  Subject matter wherein addresses are determined for memory not normally accessible by a base operating system, computer, or digital data processing system components. (1) Note. Classification here may include virtual addressing techniques; however, virtual memory addressing art which deals with logical addressing techniques as opposed to addressing for physical enhancements, such as extended and expanded memory, is classified elsewhere in this class. SEE OR SEARCH THIS CLASS, SUBCLASS: 203+, for virtual addressing, per se.

3	Addressing cache memories:
	This subclass is indented under subclass 1.  Subject matter wherein addresses are generated for memory nearest a processor in a hierarchical memory arrangement (i.e., a cache memory arrangement). (1) Note. This subclass accommodates particular addressing techniques for cache memory systems. Cache memory accessing and control (i.e., reading and writing) are classified elsewhere in this class. See the SEARCH THIS CLASS, SUBCLASS notes below. SEE OR SEARCH THIS CLASS, SUBCLASS: 117+, for hierarchical memory arrangement accessing and control, including cache memory in subclasses 118 through 146. SEE OR SEARCH CLASS: 365,  Static Information Storage and Retrieval,   subclass 49.1 for internal aspects of associative memory.

4	Dynamic-type storage device (e.g., disk, tape, drum):
	This subclass is indented under subclass 1.  Subject matter wherein address schemes are particular to a data storage device requiring relative motion between a data holding medium and a recording mechanism such as disk, tape, or drum memory. SEE OR SEARCH CLASS: 360,  Dynamic Magnetic Information Storage or Retrieval,   which is an integral part of Class 369, following subclass 18 , for record carriers and systems wherein information is stored and retrieved by interaction with a medium and there is relative motion between a medium and a transducer (e.g., magnetic disk drive devices and control thereof, per se). See Class 360, subclass 72.2 for addressing and control of recording mechanism to locate the selected area. 369,  Dynamic Information Storage or Retrieval,   various subclasses for record carriers and systems wherein information is stored and retrieved by interaction with a medium and there is relative motion between a medium and a transducer. Particularly, see subclasses 30.01 through 41.01for selective addressing of dynamic storage medium.

5	For multiple memory modules (e.g., banks, interleaved memory):
	This subclass is indented under subclass 1.  Subject matter wherein logical addresses are determined and mapped (e.g., interleaving) across different physical memory arranged in blocks, banks, partitions, etc. (1) Note. This subclass includes subject matter directed to static column or static row handling in multiple physical memory module addressing. SEE OR SEARCH THIS CLASS, SUBCLASS: 127, for interleaved cache. SEE OR SEARCH CLASS: 365,  Static Information Storage and Retrieval,   subclasses 230.03 and 230.04 for subject matter including plural banks or blocks and alternating between them.

6	Virtual machine memory addressing:
	This subclass is indented under subclass 1.  Subject matter wherein addresses are determined in a memory system accommodating addressing requirements for software emulation of a target computer or digital data processing system on a base computer or digital data processing system. (1) Note. Classification here includes virtual addressing techniques (that is, for example, processing logical to physical (real, absolute) address translation entries. Virtual memory addressing deals with logical addressing techniques. Classificaiton here is proper if there is significant virtual memory processing for systems accomodating emulation of a tarte computer of digital data processin system on a base computer or digital data processing system. Logical addressing for physical enhancements, such as extended and expanded memory, is classified elsewhere in theis class. SEE OR SEARCH THIS CLASS, SUBCLASS: 202 through 210, for address mapping and virtual addressing, per se. SEE OR SEARCH CLASS: 703,  Data Processing: Structural Design, Modeling, Simulation, and Emulation,   appropriate subclasses. 718,  Electrical Computers and Digital Processing Systems: Virtual Machine Task or Process Management or Task Management/Control,   subclass 1 for virtual machine task or process management.

100	STORAGE ACCESSING AND CONTROL:
	This subclass is indented under the class definition.  Subject matter comprising means (e.g., a processor, a controller, etc.) or steps for governing memory in a computer or digital data processing system or the passage (e.g., reading, writing) of data thereto. (1) Note. The subject matter of this subclass and the subclasses thereunder provides for details of how memory is accessed and controlled. Classification herein requires more than nominal recitation of accessing or controlling memory in the context of digital data processing systems or data processing. Examples of significant memory accessing and control data processing include transferring and modifying memory address data, selecting memory devices or memory locations, and scheduling memory accesses. (2) Note. Storage devices such as static memory devices, holographic stores, disk drives (and the mechanical control of disk drives, e.g., head positioning, substrate speed, etc.), and optical stores, are classified, per se, in their respective device classes. (3) Note. Subject matter classified herein may include nominal recitations of address data generation, manipulation, and modification. Combinations of a particular memory construct (e.g., cache) with accessing and control and significant addressing as exemplified by data processing functions such as combining, translating, mapping, and other techniques associated with forming and modifying addresses, however, are classified in superior subclasses directed to such combinations. See the SEARCH THIS CLASS, SUBCLASS notes below. (4) Note. Classification herein requires more than nominal recitation of means or steps for controlling memory. (5) Note. This subclass and the subclasses thereunder also provide for subject matter wherein static or dynamic storage forms part of a digital data processing system. (6) Note. Subject matter classified herein may include nominal recitations of reliability and availability in combination with memory accessing and control. The species of reliability and availability related to data archiving, backup, and device access limiting and security combined with memory accessing and controlling is classified herein. Other species of reliability and availability combined with memory accessing and controlling are classified elsewhere. See the SEARCH THIS CLASS, SUBCLASS notes below. (7) Note. Memories known as display memory, display buffers, frame buffers, VRAMs, etc., functioning in combination to store image data for image processing are properly classified elsewhere. Subject matter for interfacing between a graphics processor and a memory is classified elsewhere. See the SEARCH THIS CLASS, SUBCLASS notes and SEARCH CLASS notes below for the information handling subclasses relevant to memories acting on display data. (8) Note. Means or steps for accessing and controlling plural memory configurations (e.g., data farms, "library" systems, etc.) including significant data processing are classified here. Details of control systems for medium delivery such as robotics or automated tape, cartridge, and platter selection and delivery, however, are properly classified elsewhere under automated control or another appropriate subclass in the respective device, robotics, and generic control classes. In instances where there is significant data processing and significant details of medium delivery systems, classification should be based on the hierarchy of classes and classified here. (9) Note. This subclass is directed to generic memory accessing and control. Database accessing and retrieval is classified elsewhere. See the SEARCH THIS CLASS, SUBCLASS notes below. SEE OR SEARCH THIS CLASS, SUBCLASS: 161+, for reliability and availability combined with memory accessing and control provided for in this array. See the (6) Note for subclass 100 above. SEE OR SEARCH CLASS: 340,  Communications: Electrical,   subclasses 825 through 825.98for controlling one or more devices to obtain a plurality of results by transmission of a designated one of plural distinctive control signals over a smaller number of communication lines or channels, particularly subclasses 2.1-2.8 for path selection, subclasses 3.1-3.9 for communication systems where status of a controlled device is communicated, subclass 825.02 for tree or cascade selective communication, subclasses 825.2-825.21 for synchronizing selective communication systems, subclasses 825.52 and 825.53 for addressing, and subclasses 825.57-825.69 for pulse responsive actuation. 345,  Computer Graphics Processing and Selective Visual Display Systems,   subclasses 530 through 574for memory organization and structure for storing images to be displayed and subclasses 531-574 for interfacing between a graphics processor and a memory. 353,  Optics: Image Projectors,   subclasses 25+ for selective data retrieval of stored information viewed by a projection means. 358,  Facsimile and Static Presentation Processing,   subclasses 1.16 and 1.17 for static presentation processing combined with memory. 361,  Electricity: Electrical Systems and Devices,   subclasses 684+ for computer storage component combined with housing or mounting arrangement having no data processing or calculating procedures. 369,  Dynamic Information Storage or Retrieval,   subclasses 30.01 through 41.01,69, and 176-271, as appropriate, for subject matter related to designation or selection of storage medium to be used for storage and retrieval. 370,  Multiplex Communications,   for the simultaneous transmission of two or more signals over a common medium, particularly subclasses 351+ for time division multiplex (TDM) switching, subclasses 475+ for asynchronous TDM communications including addressing, and subclasses 498+ for time division bus transmission. 704,  Data Processing: Speech Signal Processing, Linguistics, Language Translation, and Audio Compression/Decompression,   subclasses 2+ for memory control scheme combined with linguistics. 707,  Data Processing: Database and File Management or Data Structures,   subclasses 1+ for database management and file management systems including significant addressing, retrieval, or manipulation of information contained within a database of a digital data processing system or computer including searching, query processing, information locating and retrieval techniques from a file or database; subclasses 100+ for database schema types; and subclasses 200+ for file maintenance operations, allocating or deallocating memory space to files, garbage collection, and hierarchical or tree filling systems. 710,  Electrical Computers and Digital Data Processing Systems: Input/Output,   subclasses 1+ for combinations of data transfers performed by a peripheral (e.g., I/O processors, DMA, I/O controllers, I/O adapters, etc.) between digital data processing systems or computers and peripherals; subclasses 22+ for Direct Memory Access (DMA) or direct data transfers to or from memory or to or from other peripherals and for data transfers performed by a peripheral between external components such as disk drives, peripheral devices, etc., which involves I/O processing; and subclasses 100+ for connections within a single computer or digital data processing system arrangement such as interfacing, bus arbitration, bus expansion. 712,  Electrical Computers and Digital Processing Systems: Processing Architectures and Instruction Processing (e.g., Processors),   subclasses 220+ for processing control and instruction processing, per se, which often includes access to registers surrounding functional units of a processor. 714,  Error Detection/Correction and Fault Detection/Recovery,   subclasses 1+ for reliability and availability combined with memory accessing and control not provided for herein (see the ( 6 ) Note above). 717,  Data Processing: Software Development, Installation, and Management,   subclasses 151 through 161for software/program optimization of memory usage or other resource usage (e.g., optimization by removing redundancy, eliminating unnecessary memory accesses, etc.). 901,  Robots,   appropriate cross-reference art collections for reprogrammable, multifunction manipulators designed to move devices.

101	Specific memory composition:
	This subclass is indented under subclass 100.  Subject matter wherein control of the memory or the accessing thereof is adapted to the type of memory being accessed. (1) Note. Structures and particulars of the memory device itself are classified in the relevant device class. (2) Note. Subject matter included herein is directed to the specifics of accessing technique employed to access and control the memory by computers, digital data processing systems, processors, or other users. (3) Note. The nature of data stored in a memory (i.e., the information) does not make the memory "specific" within the context of this and its indented subclasses (e.g., video or image data, printer buffer, control data memory, etc.). (4) Note. Accessing and controlling of a multiport memory, per se, are classified elsewhere in this class. See the SEARCH THIS CLASS, SUBCLASS notes below. SEE OR SEARCH THIS CLASS, SUBCLASS: 131, for multiport cache. 149, for shared multiport memory. SEE OR SEARCH CLASS: 235,  Registers,   subclasses 375+ for systems controlled by data bearing records. 313,  Electric Lamp and Discharge Devices,   subclasses 391+ for cathode ray tube storage devices. 326,  Electronic Digital Logic Circuitry,   subclasses 37+ for multifunctional or programmable logic (e.g., gate arrays) and subclasses 52+ and 104+ for generic logic functions such as EXOR, AND, OR, NOT, and decoding. 369,  Dynamic Information Storage or Retrieval,   subclasses 30.01 through 41.01,69, and 176-271, as appropriate, for subject matter related to designation or selection of storage medium to be used for storage and retrieval. 439,  Electrical Connectors,   subclasses 43+ for plug board connections and pins, and subclasses 55+ for preformed panel circuit arrangements (e.g., ICs, chips, wafers, etc.). 902,  Electronic Funds Transfer,   cross-reference art collections 25+ for smart card memories.

102	Solid-state read only memory (ROM):
	This subclass is indented under subclass 101.  Subject matter including means or steps for accessing solid-state randomly accessible nonvolatile memory (e.g., ROM). SEE OR SEARCH CLASS: 365,  Static Information Storage and Retrieval,   appropriate subclasses for storage having a particular internal cell structure (e.g., subclass 94 for read only (i.e., semipermanent) systems), subclasses 189.011 for memory read/write circuits, and subclasses 230.01+ for addressing circuits.

103	Programmable read only memory (PROM, EEPROM, etc.):
	This subclass is indented under subclass 102.  Subject matter including means or steps for accessing and controlling programmable solid-state nonvolatile memory (e.g., PROM, EPROM, EEPROM, flash, etc.).

104	Solid-state random access memory (RAM):
	This subclass is indented under subclass 101.  Subject matter including apparatus or method for accessing volatile randomly accessible memory. SEE OR SEARCH CLASS: 365,  Static Information Storage and Retrieval,   subclasses 129+ for various memory elements used in random access memory construction.

105	Dynamic random access memory:
	This subclass is indented under subclass 104.  Subject matter including means or steps for accessing volatile memory requiring periodic refreshing (e.g., DRAM, Dynamic RAM, etc.).

106	Refresh scheduling:
	This subclass is indented under subclass 105.  Subject matter including specifics of coordinating refreshing operations with other system operations. (1) Note. This subclass is proper for subject matter directed to coordinating refresh scheduling with other system events, accesses, requirements, etc., external to the memory cells. However, coordinating the timing requirements within a memory cell or composite thereof is classified elsewhere. See the SEARCH CLASS notes below. SEE OR SEARCH CLASS: 365,  Static Information Storage and Retrieval,   appropriate subclasses for timing requirements at the cell level and for storage having a particular internal cell structure (e.g., subclass 222 for memory refreshing).

107	Ferrite core:
	This subclass is indented under subclass 101.  Subject matter comprising arrays of magnetizable rings as the individual storage elements. (1) Note. In the 1960"s the term "core memory" referred exclusively to memory with ferrite cores. Also at that time, the main memory of large systems were exclusively of this type. As the art progressed, the term core memory became a holdover to refer to the system"s main memory, regardless of the actual type of memory being used. Therefore, if core memory is claimed, the specification should be checked to see if the memory is indeed core memory (i.e., ferrite memory) for classification here; otherwise, it should be treated as solid-state memory and classified elsewhere. SEE OR SEARCH THIS CLASS, SUBCLASS: 102+, for ROM accessing and control. 104+, for RAM accessing and control.

108	Content addressable memory (CAM):
	This subclass is indented under subclass 101.  Subject matter including memory of the type where elements are addressed according to the