This is the generic class for electronic digital logic devices,
circuitry and subcombinations thereof, wherein non-arithmetical
operations are performed upon discrete electrical signals representing
a value normally described by numerical digits.
COMBINATION WITH BASIC SUBJECT MATTER INCLUDED IN THIS CLASS:
Included in this class (326) is subject matter relating to:
1. digital circuits which perform basic logic functions such
as AND, OR, NAND, NOR, EX-OR, or NOT;
2. decoder, inhibitor, multifunctional, or programmable logic
circuits, etc., which perform basic logic functions and are used
in an environment that is not related to any particular art provided
for by other classes;
3. circuits that are used to control the performance of digital
logic circuits, such as accelerating, switching, reliability, transmission
integrity, etc.;
4. circuits that are used to control the functioning or to interface
logical devices or circuitry, such as driving, clocking, or synchronizing.
SECTION II - NOTES TO THE CLASS DEFINITION
(1)
Note. An electronic device is a device in which conduction
is principally by the movement of electrons through a vacuum, gas,
semiconductor or superconductor. This definition excludes inductors,
capacitors, resistors, and similar components which deal primarily
with the conduction of large currents of electricity through metals.
(2)
Note. Logic is a science dealing with the basic principles
and applications of truth tables, Boolean algebra, etc. and is also called
symbolic logic which is a mathematical approach to the solution
of complex situations by the use of symbols to define basic concepts.
The three basic logic symbols are AND, OR, and NOT. When used in Boolean
algebra, these symbols are somewhat analogous to addition and multiplication.
(3)
Note. Examples of non-arithmetical operations are selecting,
searching, sorting, or matching. Half-adder circuits in this class accepting
two binary inputs are also considered non-arithmetic.
(4)
Note. Discrete signals are discontinuous signals which can
only assume a finite number of states.
(5)
Note. Numerical digits are symbols that represent a specific
quantity or amount of units.
(6)
Note. The value described may include a value represented
by a pulse repetition rate.
(7)
Note. A full adder circuit, which is a half adder circuit
with look ahead carry (three binary inputs), is considered arithmetic
and is classified elsewhere. See References to Other Classes, below,
for an electric digital calculating computer.
SECTION III - LINES WITH OTHER CLASSES AND WITHIN THIS CLASS
COMBINATION WITH BASIC SUBJECT MATTER EXCLUDED FROM THIS CLASS:
The combination of the subject matter of this class and another
art environment is generally classified with the art device where
the environment is significant by virtue of the claimed relationship.
Examples include: Logic devices combined with memory systems; Logic
devices in arithmetical calculators; Logic circuits in signal discriminators
using coincidence function.
See References to Other Classes for the above art areas and
to complete the search for subject matter of Class 326.
DIGITAL LOGIC DEVICES EXCLUDED FROM THIS CLASS:
Some particular types of digital logic devices are not classified
in this class (326), such as:
Fluidic logic devices
Saturated non-linear reactor logic circuits
Detailed flip-flops, per se, generally are classified elsewhere;
however, a multifunctional or programmable logic having a flip-flop
is found in this class (326) and redundant logic having a flip-flop
is also found in this class (326). See Subclass References to the
Current Class, below.
Pulse counters, pulse dividers, or shift registers are classified
elsewhere.
Optical logic gates are excluded from this class.
Laser logic systems are excluded from this class.
Neuron circuits are excluded from this class.
See References to Other Classes for the above art areas and
to complete the search for subject matter of Class 326.
SECTION IV - SUBCLASS REFERENCES TO THE CURRENT CLASS
Active Solid-State Devices (e.g., Transistors, Solid-State
Diodes), appropriate subclasses for non-linear, active
solid-state devices, per se, without any significant external electrical circuitry.
Miscellaneous Active Electrical Nonlinear Devices,
Circuits, and Systems, especially
subclasses 1+ for signal discriminating, comparing, or selecting
circuits that use logic circuits; subclasses 23+ for logic
circuits in signal discriminators using coincidence function; subclasses
185+ for detailed flip-flops, per se, generally; however,
a multifunctional or programmable logic having a flip-flop is found
in this class (326), See Lines With Other Classes, above; subclasses
199+ for signal converting, shaping, or generating circuits
that use detailed flip-flops; and subclasses 365+ for miscellaneous
gating circuits.
Communications: Electrical,
subclass 146.2 for digital comparator systems and subclass 14.4
for a crosspoint decoder matrix switch with logic function.
Static Information Storage and Retrieval,
subclass 5 for magnetic bubbles including a logic device;
subclass 89 for magnetic shift registers including a logic device;
subclass 189.08 for read/write circuits including plural
element logic arrangement; and subclass 167 for read/write
systems which use a simulating biological cell as a storage element.
Electrical Pulse Counters, Pulse Dividers, or Shift
Registers: Circuits and Systems,
subclass 73 and 74 for shift register including an input logic
circuit; subclass 81 for shift register transfer means with logic
circuit; and subclasses 116 and 117 for master-slave transfer means
including logic circuit.
Superconductor Technology: Apparatus, Material,
Process,
subclass 858 and 859 for cross-reference art collections relating
to electrical transmission or interconnection using digital logic
circuitry.
Error Detection/Correction and Fault
Detection/Recovery,
subclasses 724+ for testing of information content of a digital
logic signal.
SECTION VI - GLOSSARY
DIGITAL SIGNAL
An electrical signal with discrete, well-defined logic levels
or states. Digital normally means binary or two-state.
DIGITAL CIRCUIT
A circuit which operates at two or more discrete welldefined
logic levels or states, in the manner of a switch, such as either "on" or "off" or "high" or "low" (i.e.,
high voltage or low voltage).
ELECTRONIC
Pertaining to that branch of science which deals with
the motion, emission, and behavior of currents of free electrons,
especially in vacuum, gas, or phototubes and special conductors
or semiconductors. The term electronic is contrasted with electric,
which pertains to the flow of large currents in metal conductors.
ELECTRONIC DEVICE
A device in which conduction is principally by the movement
of electrons through a vacuum, gas, or semiconductor. This definition
excludes inductors, capacitors, resistors, and similar components.
LOGIC
The science dealing with the basic principles and applications
of truth tables, Boolean algebra, etc.
SOLID-STATE
(a) Technology utilizing solid semiconductors in place of
vacuum tubes for amplification, rectification, or switching. (b)
Pertaining to circuits and components using semiconductors.
SOLID-STATE DEVICE
An electronic device which operates by virtue of the movement
of electrons within a solid piece of semiconductor material.
This subclass is indented under the class definition. Subject matter including one or more logic circuits having
at least one element whose electrical resistance becomes essentially zero
at a very low temperature (e.g., 30 degrees Kelvin, etc.).
(1)
Note. This class includes superconductive devices operating
at "low" temperature (i.e., 30 K or lower); however,
Class 505 includes superconductive devices operating at "high" temperature
(i.e., higher than 30 K).
Miscellaneous Active Electrical Nonlinear Devices,
Circuits, and Systems,
subclass 186 for superconductive stable state circuits, subclasses
366+ for superconductive switching circuits, and subclasses
527+ for miscellaneous superconductive devices.
This subclass is indented under subclass 1. Subject matter including an electronic device whose operation
is based on an ability (i.e., quantum mechanical nature) of certain
atomic particles to pass through a barrier that they cannot pass
over because of a required energy level.
This subclass is indented under subclass 2. Subject matter including an electronic fast-switching device,
known as a Josephson junction device, which permits conduction through a
thin dielectric insulating layer by quantum mechanical tunneling.
(1)
Note. The operation of a Josephson tunneling device is based
on a theoretical consideration, that if two superconductors are
brought close enough together, a current will flow across the gap
between them. Under certain conditions, a voltage appears across
the gap, and a high frequency radiation emanates from the gap.
This subclass is indented under subclass 3. Subject matter including a device which controls or modulates
electrical currents based on the quantum wave properties of a current
carrying electrons in solids.
(1)
Note. A superconductive interference device is also called
a superconductive quantum interference device or SQUID.
(2)
Note. A SQUID may obtain the control or modulation of electrical
currents by, for example, causing a relative phase displacement
between at least two currents flowing through a superconductor and
combines these two currents after the phase displacement has been achieved,
etc.
This subclass is indented under subclass 2. Subject matter wherein the logic operations are limited
to those defined by the Boolean algebraic operations of AND, OR,
NAND, NOR, or NOT.
This subclass is indented under subclass 1. Subject matter wherein the logic operations are limited
to those defined by the Boolean algebraic operations of AND, OR,
NAND, NOR, or NOT.
This subclass is indented under the class definition. Subject matter including an intentional disabling circuit
which conceals or prevents obtaining stored data or designed integrated circuit
structure.
(1)
Note. In this class (326), the security is performed by disabling
or masking the circuit structure, while in Class 380, the security
is performed by encrypting data information.
Data Processing: Financial, Business Practice,
Management, or Cost/Price Determination,
subclass 57 and 58 for preventing access to or copying of stored
information in a distributed data file.
This subclass is indented under the class definition. Subject matter having a device for improving the operational
quality of a logic circuit, such that an operational procedure yields the
same results on repeated trials.
(1)
Note. For increasing the operational reliability, a circuit
may include a fault detection, a warning signal indication, or an
operational isolation such that a component failure in one channel
does not affect the operation of the remaining channel, etc.
Electricity: Electrical Systems and Devices, appropriate subclasses for a voltage or current
responsive fault sensor, which may include semiconductor devices.
Electrical Computers: Arithmetic Processing and
Calculating,
subclasses 530+ for error detection/correction or fault/recovery
in the performance of arithmetic operations.
Error Detection/Correction and Fault Detection/Recovery, appropriate subclasses for subject matter limited
to particular transmission loss or recovery of information content
(e.g., pulse coded data, etc.).
This subclass is indented under subclass 9. Subject matter wherein the logic circuit comprises at least
one duplicate logic stage which will assume operation upon failure
of an original logic stage.
This subclass is indented under subclass 10. Subject matter including a logic level switching circuit
having a plurality of inputs which actuate the duplicate logic stage
whenever one of the following conditions is obtained (a) More than
half, but less than all inputs are "fault" (i.e.,
majority); (b) More than one, but less than half of all the inputs
are "fault" (i.e., minority); or (c) Various predetermined
combinations, together or in predetermined sequence, of the inputs
are "fault" (i.e., weighted).
This subclass is indented under subclass 10. Subject matter comprising a logic circuit which has two
or more distinct current-conductive stable states and which toggles
from one state to the other in response to an external stimulus.
(1)
Note. A flip-flop is the most common memory element in a
sequential circuit which requires a storage of previous input information.
This subclass is indented under subclass 10. Subject matter including a unipolar transistor in which
current carriers are injected at a source terminal and pass to a
drain terminal through a channel of semiconductor material whose
conductivity depends largely on an electrical field applied to the
semiconductor from a control electrode (gate).
(1)
Note. In a unipolar transistor, the source to drain current
involves only one type of charge carrier (i.e., holes in a p-type material
channel and electrons in an n-type material channel).
(2)
Note. Two types of FET structures are prevalent: (a) an
all-junction device, known as a junction FET or JFET characterized
by having heavily doped impurity regions of one type (e.g., p-type material),
known as gate regions, on both sides of a second type semiconductor
bar (e.g., n+ type material, etc.) to form a pn junction
and (b) a device such as a MOSFET/IGFET, consisting of
a lightly doped substrate (e.g., p-type material, etc.) into which
two highly doped regions (e.g., n+ type material, etc.)
are diffused for forming source/drain regions with the
area therebetween becoming the channel for current carriers (i.e.,
holes or electrons) and with a layer of insulating material (e.g.,
SiO2) grown over the channel surface for separating
the channel from a control (i.e., gate) electrode.
This subclass is indented under subclass 9. Subject matter including a device which prevents generating
a valid output upon an operational failure of the logic circuitry.
(1)
Note. The fail-safe condition can be, for example, an automatic
shut down of the logic circuitry or a predetermined, unchanging
logic voltage output level.
(2)
Note. The fail-safe condition may be actuated, for example,
by invalid logic input signals or loss of such signals to the input
as well as circuit breakdown or component malfunction which traverses the
desired logic action.
This subclass is indented under subclass 9. Subject matter wherein the logic device is part of a monolithic
integrated circuit, and is intended to prevent an unwanted interaction between
circuit components in the monolithic integrated circuit.
(1)
Note. A monolithic integrated circuit is a device in which
all components are fabricated on a single chip of silicon. Interconnections
among components are provided by means of metallization patterns
on the surface of the chip structure, and the individual parts are
not separable from the complete circuit. External connecting wires
are taken out to terminal pins or leads.
This subclass is indented under the class definition. Subject matter wherein the logic circuit includes a specific
circuit or device to enable a testing function to be performed (e.g.,
a bypass circuit that connects a signal input directly to an output,
thus bypassing the logic circuit for a testing purpose, etc.).
(1)
Note. This subclass comprises the testing facilitation of
digital logic circuits; however, when the information content of
a digital logic signal is involved, classification is elsewhere,
see SEE OR SEARCH CLASS, below.
(2)
Note. Class 324 is the residual class for any test that involves
the testing of electrical device parameters.
This subclass is indented under the class definition. Subject matter including a circuit to minimize the time
delay at the turn-on or turn-off period of the switch, therefore
increasing the switching speed.
This subclass is indented under subclass 17. Subject matter including a semiconductor device of the type
having at least three electrodes (emitter, base, and collector),
two potential barriers and having a controlled current flow of both
majority and minority carriers (i.e., holes and electrons).
(1)
Note. A conventional bipolar transistor has three electrodes
which include npn or pnp type materials (in the npn type, current
flows from a collector terminal to an emitter terminal and in the
pnp type transistor, current flows from an emitter terminal to a
collector terminal).
This subclass is indented under subclass 18. Subject matter including a semiconductor device which operates
on the principle of injecting very highly concentrated (i.e., "hot") majority
carriers across a potential difference barrier which is formed by
the junction of a metal layer deposited on a lightly doped semiconductor
crystal.
This subclass is indented under subclass 19. Subject matter including at least two bipolar transistors
of opposite conductivity types (i.e., npn and pnp).
This subclass is indented under the class definition. Subject matter including a device to improve the reception
of input signals at the logic circuit, or a device to maintain without distortion
the logic signals produced at either (a) an output for coupling
or interfacing to another stage or stages or (b) an intermediate location
of the logic circuit to preclude signal or transmission deterioration
(e.g., by power dissipation or by reflection, etc.).
Miscellaneous Active Electrical Nonlinear Devices,
Circuits, and Systems,
subclasses 379+ for signal transmission integrity or spurious noise
override in a switching circuit.
This subclass is indented under subclass 21. Subject matter having a circuit to reduce the possibility
of switching due to noise input instead of signal input.
(1)
Note. An example of reducing noise in the time domain is
using a low pass filter at the input to filter out high frequency noise.
(2)
Note. An example of reducing noise in the amplitude domain
is using a Schmitt trigger which uses a feedback mechanism to eliminate
noise.
Miscellaneous Active Electrical Nonlinear Devices,
Circuits, and Systems,
subclasses 72+ for an input signal compared to reference derived
therefrom, subclasses 74+ for an input signal compared
to plural fixed references, and subclasses 205+ for miscellaneous
hysteresis circuits (including a Schmitt trigger).
This subclass is indented under subclass 22. Subject matter including a unipolar transistor in which
current carriers are injected at a source terminal and pass to a
drain terminal through a channel of semiconductor material whose
conductivity depends largely on an electrical field applied to the
semiconductor from a control electrode (gate).
(1)
Note. In a unipolar transistor, the source to drain current
involves only one type of charge carrier (i.e., holes in a p-type material
channel and electrons in an n-type material channel).
(2)
Note. Two types of FET structures are prevalent: (a) an
all-junction device, known as a junction FET or JFET characterized
by having heavily doped impurity regions of one type (e.g., p-type material),
known as gate regions, on both sides of a second type semiconductor
bar (e.g., n+ type material, etc.) to form a pn junction
and (b) a device such as a MOSFET/IGFET, consisting of
a lightly doped substrate (e.g., p-type material, etc.) into which
two highly doped regions (e.g., n+ type material, etc.)
are diffused for forming source/drain regions with the
area therebetween becoming the channel for current carriers (i.e.,
holes or electrons) and with a layer of insulating material (e.g.,
SiO2) grown over the channel surface for separating
the channel from a control (i.e., gate) electrode.
This subclass is indented under subclass 23. Subject matter including at least a unit of two field-effect
transistor elements connected in series with their gate terminals
tied together, each having a channel of conductivity type opposite
that of the other (e.g., p-channel vs. n-channel).
This subclass is indented under subclass 23. Subject matter wherein the logic circuit includes a depletion
type which has its channel conductivity on for a zero or a negative
gate-source voltage, or an enhancement type which is normally off
with a zero or a negative applied gate-source voltage.
This subclass is indented under subclass 21. Subject matter having a circuit to reduce noise in a power
supply line which is a function of parasitic inductance and the
switching current.
This subclass is indented under subclass 26. Subject matter including a unipolar transistor in which
current carriers are injected at a source terminal and pass to a
drain terminal through a channel of semiconductor material whose
conductivity depends largely on an electrical field applied to the
semiconductor from a control electrode (gate).
(1)
Note. In a unipolar transistor, the source to drain current
involves only one type of charge carrier (i.e., holes in a p-type material
channel and electrons in an n-type material channel).
(2)
Note. Two types of FET structures are prevalent: (a) an
all-junction device, known as a junction FET or JFET characterized
by having heavily doped impurity regions of one type (e.g., p-type material),
known as gate regions, on both sides of a second type semiconductor
bar (e.g., n+ type material, etc.) to form a pn junction
and (b) a device such as a MOSFET/IGFET, consisting of
a lightly doped substrate (e.g., p-type material, etc.) into which
two highly doped regions (e.g., n+ type material, etc.)
are diffused for forming source/drain regions with the
area therebetween becoming the channel for current carriers (i.e.,
holes or electrons) and with a layer of insulating material (e.g.,
SiO2) grown over the channel surface for separating
the channel from a control (i.e., gate) electrode.
This subclass is indented under subclass 27. Subject matter wherein the logic circuit is responsive to
a predetermined time-related signal or a periodic signal in addition
to an input logic signal.
This subclass is indented under subclass 21. Subject matter including a circuit to alter the waveform
of an output pulse signal, for example, steepening the edges of
a pulse.
This subclass is indented under subclass 21. Subject matter having a circuit to preclude signal or transmission
deterioration by (a) using an impedance element to eliminate the
reflective wave energy caused by impedance differences between the
network and a connected circuit or (b) using a diode circuit to
clamp or to clip the reflective wave riding on the top of an incident
wave.
This subclass is indented under subclass 21. Subject matter having a circuit to keep relatively constant
the DC output signal levels, or the DC switching voltage levels.
This subclass is indented under subclass 31. Subject matter wherein the output signal levels or the switching
threshold levels are kept relatively constant in an environment
having temperature changes.
This subclass is indented under subclass 31. Subject matter wherein the output signal levels or the switching
threshold levels are compensated for fluctuations in voltage or
current supply.
This subclass is indented under subclass 31. Subject matter including a unipolar transistor in which
current carriers are injected at a source terminal and pass to a
drain terminal through a channel of semiconductor material whose
conductivity depends largely on an electrical field applied to the
semiconductor from a control electrode (gate).
(1)
Note. In a unipolar transistor, the source to drain current
involves only one type of charge carrier (i.e., holes in a p-type material
channel or electrons in an n-type material channel).
(2)
Note. Two types of FET structures are prevalent: (a) an
all-junction device, known as a junction FET or JFET characterized
by having heavily doped impurity regions of one type (e.g., p-type material),
known as gate regions, on both sides of a second type semiconductor
bar (e.g., n+ type material, etc.) to form a pn junction
and (b) a device such as a MOSFET/IGFET, consisting of
a lightly doped substrate (e.g., p-type material, etc.) into which
two highly doped regions (e.g., n+ type material, etc.)
are diffused for forming source/drain regions with the
area therebetween becoming the channel for current carriers (i.e.,
holes or electrons) and with a layer of insulating material (e.g.,
SiO2) grown over the channel surface for separating
the channel from a control (i.e., gate) electrode.
THRESHOLD (E.G., MAJORITY, MINORITY, OR WEIGHTED INPUTS,
ETC.):
This subclass is indented under the class definition. Subject matter including a logic level switching circuit
which has a plurality of inputs which actuate the output to switch
to one of at least two logic levels whenever one of the following
conditions is obtained: (a) More than half, but less than all of
the inputs are "on" (i.e., majority); (b) More
than one, but less than half of all the inputs are "on" (i.e.,
minority); or (c) Various predetermined combinations, together or
in predetermined sequence, of the inputs are "on" (i.e.,
weighted).
Miscellaneous Active Electrical Nonlinear Devices,
Circuits, and Systems,
subclasses 50+ for signal amplitude comparators which utilize
at least one threshold.
This subclass is indented under subclass 35. Subject matter including a unipolar transistor in which
current carriers are injected at a source terminal and pass to a
drain terminal through a channel of semiconductor material whose
conductivity depends largely on an electrical field applied to the
semiconductor from a control electrode (gate).
(1)
Note. In a unipolar transistor, the source to drain current
involves only one type of charge carrier (i.e., holes in a p-type material
channel or electrons in an n-type material channel).
(2)
Note. Two types of FET structures are prevalent: (a) an
all-junction device, known as a junction FET or JFET characterized
by having heavily doped impurity regions of one type (e.g., p-type material),
known as gate regions, on both sides of a second type semiconductor
bar (e.g., n+ type material, etc.) to form a pn junction
and (b) a device such as a MOSFET/IGFET, consisting of
a lightly doped substrate (e.g., p-type material, etc.) into which
two highly doped regions (e.g., n+ type material, etc.)
are diffused for forming source/drain regions with the
area therebetween becoming the channel for current carriers (i.e.,
holes or electrons) and with a layer of insulating material (e.g.,
SiO2) grown over the channel surface for separating
the channel from a control (i.e., gate) electrode.
MULTIFUNCTIONAL OR PROGRAMMABLE (E.G., UNIVERSAL, ETC.):
This subclass is indented under the class definition. Subject matter including (a) a logic circuit capable of
either producing different logic function operations from the same
logic element or providing a particular, selected (i.e., programmed)
logic operation from plural logic elements (e.g., an array, etc.)
or (b) details related to the actual setting or programming of the
desired logic functions in such a logic circuit.
(1)
Note. A multifunctional logic element is, for example, a
single element capable of being changed by a control signal from
an "AND" to a "NOT" logic function.
Static Information Storage and Retrieval, appropriate subclass for electromagnetic storage systems,
and
subclasses 185.01+ for floating gate memory storage (e.g., flash memory).
This subclass is indented under subclass 37. Subject matter which includes specific procedures which
establish the desired overall logic circuit operation.
This subclass is indented under subclass 37. Subject matter having a group of many similar logic elements
connected in series or in parallel (row or column) to form a matrix
of two or three dimensions wherein the interconnection between rows
or columns can be selectively connected to perform a logical function.
(1)
Note. Programmable logic array (PLA), programmable array
logic (PAL), or programmable logic device (PLD) are common terms
to indicate devices included in this subclass which may be, for
example, a combination of a programmable AND array and a programmable
OR array, or all other possible combinations of logic functions.
Static Information Storage and Retrieval,
subclass 189.08 for read/write circuit including plural
elements logic arrangement to handle information signal.
Electrical Computers: Arithmetic Processing and
Calculating,
subclasses 230+ for programming logic circuits with computational
means (i.e., arithmetical operation).
This subclass is indented under subclass 39. Subject matter comprising a logic circuit which has two
or more distinct current-conductive stable states which toggles
from one state to the other in response to an external stimulus
or comprising a series connection of such circuits.
(1)
Note. A flip-flop is the most common memory element in a
sequential circuit which requires storage of previous input information.
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